Patent US5619659A successfully refreshed from Google Patents.
US5619659A
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System for extending ISA bus without using dedicated device driver software by using E2 P2 interface which provides multiplexed bus signal through standard parallel port connector
Assignee: PDACO Ltd
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Filing: 1995-06-30
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Granted: 1997-04-08
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Expires: 2015-06-30
Abstract
Abstract A bus interface system for expanding the I/O capability of a portable computer utilizes a parallel port connector with master interface circuitry connected to the internal ISA I/O bus of the portable computer and driving a 25-conductor Centronics-type cable as an intermediate bus. The master interlace circuitry is device-driver-transparent, and multiplexes address data, and control information over a byte-wide avenue of the intermediate bus according to premapped state translation tables. In a preferred embodiment a single peripheral I/O device comprising a slave circuitry may be connected to the 25-pin port, and the slave circuitry demultiplexes the intermediate bus states, providing a synthesized sub-set of ISA states to drive the peripheral device. In another embodiment a docking box comprises a bus with multiple I/O ports, such as a network port, a COM serial port, and additional floppy and hard disk drives. Power circuitry is provided for driving a single connected peripheral device, and for recharging a docked portable computer.
Inventors
- 👤 Dan Kikinis
- 👤 William J. Seiler
- 👤 Pascal Dornier
- 👤 William S. Jocobs
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 23:15
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/00127; H04N1/00204; H04N1/00236; H04N1/00238; G; G06; G06F; G06F1/00; G06F1/16; G06F1/1613; G06F1/1632; G06F13/00; G06F13/38; G06F13/382; G06F13/385; G06K; G06K15/00; H04N1/00241; H04N1/04; H04N1/0461; F; F02; F02B; F02B75/00; F02B75/02; F02B2075/022; F02B2075/027; G06K2215/00; G06K2215/0082; H04M; H04M1/00; H04M1/72; H04M1/725; H04M3/00; H04M3/42; H04M3/42314; H04M3/42323; H04N1/00278; H04N1/113; H04N1/1135; H04N1/12; H04N1/19; H04N1/191; H04N1/192; H04N1/193; H04N2201/00; H04N2201/0008; H04N2201/001; H04N2201/0074; H04N2201/0077; H04N2201/0081; H04N2201/0082
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
144 words
A computer having a CPU and an industry standard internal I/O (ISA) bus, comprising: a standard parallel port (SPP) connector; and a state-translation circuitry connected between said internal I/O bus and said SPP connector, once configured automatically and independently of the CPU and dedicated device driver software, multiplexing signals of the internal ISA bus onto pins of SPP connector, the signals including address signals from address lines of the internal bus; wherein said CPU, upon power-up and reset of said computer, tests devices connected to the internal bus through the SPP connector for compatibility with a standard parallel port (SPP) communication mode, a standard enhanced parallel port (EPP) communication mode, and with a proprietary E 2 P 2 communication mode, and configures the state-translation circuitry to operate in an appropriate mode according to the results of the compatibility tests performed during power-up and reset.
Claim 2
Dependent Claim
144 words
A computer having a CPU and an industry standard internal I/O (ISA) bus, comprising: a standard parallel port (SPP) connector; and a state-translation circuitry connected between said internal I/O bus and said SPP connector, once configured automatically and independently of the CPU and dedicated device driver software, multiplexing signals of the internal ISA bus onto pins of SPP connector, the signals including address signals from address lines of the internal bus; wherein said CPU, upon power-up and reset of said computer, tests devices connected to the internal bus through the SPP connector for compatibility with a standard parallel port (SPP) communication mode, a standard enhanced parallel port (EPP) communication mode, and with a proprietary E 2 P 2 communication mode, and configures the state-translation circuitry to operate in an appropriate mode according to the results of the compatibility tests performed during power-up and reset.
Claim 3
Dependent Claim
61 words
A computer as in claim 1 further comprising an on-board storage power supply connected to selected pins of said SPP connector for providing power to a peripheral I/O device coupled to said SPP connector, wherein said storage power supply provides power to said peripheral I/O device through or derives charging power from said selected pins during communication across said SPP connector.
Claim 4
Dependent Claim
130 words
A peripheral I/O non-volatile mass storage device comprising: a standard parallel port (SPP) connector for interfacing with a host computer through an intermediate bus link of lesser width than internal I/O bus of said host computer; and a state translation circuitry connected between said SPP connector and a controller within said I/O mass storage device; wherein said state-translation circuitry, automatically and independently of the host computer and dedicated device driver software within said host computer, synthesizes ISA bus signals from address, data and control signals multiplexed on said intermediate bus link by a host device in accordance with a proprietary E 2 P 2 communication mode; said ISA bus signal having the same width and the same parallel structure of signal in the internal I/O bus of the host computer.
Claim 5
Dependent Claim
130 words
A peripheral I/O non-volatile mass storage device comprising: a standard parallel port (SPP) connector for interfacing with a host computer through an intermediate bus link of lesser width than internal I/O bus of said host computer; and a state translation circuitry connected between said SPP connector and a controller within said I/O mass storage device; wherein said state-translation circuitry, automatically and independently of the host computer and dedicated device driver software within said host computer, synthesizes ISA bus signals from address, data and control signals multiplexed on said intermediate bus link by a host device in accordance with a proprietary E 2 P 2 communication mode; said ISA bus signal having the same width and the same parallel structure of signal in the internal I/O bus of the host computer.
Claim 6
Dependent Claim
26 words
A peripheral I/O mass storage device as in claim 3 wherein power for operation of the mass storage device is provided over said intermediate bus link.
Claim 7
Dependent Claim
232 words
A docking box for expanding the I/O capability of a computer, comprising: a standard parallel port (SPP) connector for interfacing with a host computer through an intermediate bus link of lesser width than internal I/O bus of said host computer; a state-translation circuitry connected between said SPP connector and a parallel bus within said docking box, said parallel bus having the same width and the same parallel structure of the internal I/O bus of the host computer; and one or more peripheral I/O devices connected to said parallel bus, the peripheral I/O devices being one or more of a network port with an external connector for interfacing to a serial cable, a controller for connecting to a hard disk drive, a controller for connecting to a floppy disk drive, a serial communication port with an external serial connector, and a printer port with an external connector for interfacing to a printer; wherein said state-translation circuitry, automatically and independently of the host computer and dedicated device driver software within said host computer, synthesizes bus signals onto the parallel bus within the docking box from multiplexed address, data, and control signals on said intermediate bus link by a host device in accordance with a proprietary E 2 P 2 communication mode; said bus signal having the same width and the same parallel structure of signal in the internal I/O bus of the host computer.
Claim 8
Dependent Claim
232 words
A docking box for expanding the I/O capability of a computer, comprising: a standard parallel port (SPP) connector for interfacing with a host computer through an intermediate bus link of lesser width than internal I/O bus of said host computer; a state-translation circuitry connected between said SPP connector and a parallel bus within said docking box, said parallel bus having the same width and the same parallel structure of the internal I/O bus of the host computer; and one or more peripheral I/O devices connected to said parallel bus, the peripheral I/O devices being one or more of a network port with an external connector for interfacing to a serial cable, a controller for connecting to a hard disk drive, a controller for connecting to a floppy disk drive, a serial communication port with an external serial connector, and a printer port with an external connector for interfacing to a printer; wherein said state-translation circuitry, automatically and independently of the host computer and dedicated device driver software within said host computer, synthesizes bus signals onto the parallel bus within the docking box from multiplexed address, data, and control signals on said intermediate bus link by a host device in accordance with a proprietary E 2 P 2 communication mode; said bus signal having the same width and the same parallel structure of signal in the internal I/O bus of the host computer.
Claim 9
Dependent Claim
31 words
A docking box as in claim 5 further comprising a primary power supply connected to selected pins of said SPP connector for charging a storage power supply of a docked computer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-04-07 | 2000-10-07 | 2001-04-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-04-07 | 2004-10-07 | 2005-04-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-04-07 | 2008-10-07 | 2009-04-08 | $7700.00 | Window Closed / Lapsed |