Flash EEPROM cell and manufacturing methods thereof

Claim 1

A flash EEPROM cell, comprising: a first source and a first drain formed in a p-type silicon substrate: a second source and a second drain formed in an n-well of said p-type silicon substrate, with said second source connecting to said first drain; a first tunnel oxide and a second tunnel oxide formed on said p-type silicon substrate between said first source and said first drain, and said p-type silicon substrate between said second source and said second drain respectively; a first floating gate and a second floating gate formed on said first and second tunnel oxides, respectively, wherein said first floating gate is connected to said second floating gate; a first insulating film and a second insulating film formed on said first and second floating gates, respectively; and a first control gate and a second control gate formed on said first and second insulating films, respectively, with said first control gate connecting to said second control gate.