Abstract A nonvolatile memory device having a control gate laid over a floating gate via an interlayer insulating layer, wherein the side portions of the floating gate and the control gate have a side wall insulating film doped with phosphorus, whereby the retention of the charges stored at the floating gate is improved, and a process for production of a nonvolatile memory device comprising forming a gate insulating film, a floating gate, an interlayer insulating layer, and a control gate on a semiconductor substrate, then forming a side wall insulating film doped with phosphorus on the semiconductor substrate by chemical vapor deposition and anisotropically etching the side wall insulating layer so as to form a side wall insulating film doped with phosphorus at the side portions of the floating gate and the control gate.
A nonvolatile memory device comprising: a semiconductor substrate of a first conductivity type, a pair of spaced apart regions in said substrate of an opposite conductivity type to said first conductivity type, a floating gate disposed specially between said pair of spaced apart regions, a first insulating layer insulating said floating gate from said substrate, a control gate disposed above and insulated from said floating gate, a second insulating layer between said floating gate and said control gate for insulating therebetween, and a third insulating layer covering side surfaces of said floating gate and control gate and in contact therewith, wherein said third insulating layer has first and second regions, said first region located at the side surfaces of said floating gate and said control gate, and said first region having a higher doping concentration than said second region.
Claim 2
Dependent Claim
139 words
A nonvolatile memory device comprising: a semiconductor substrate of a first conductivity type, a pair of spaced apart regions in said substrate of an opposite conductivity type to said first conductivity type, a floating gate disposed specially between said pair of spaced apart regions, a first insulating layer insulating said floating gate from said substrate, a control gate disposed above and insulated from said floating gate, a second insulating layer between said floating gate and said control gate for insulating therebetween, and a third insulating layer covering side surfaces of said floating gate and control gate and in contact therewith, wherein said third insulating layer has first and second regions, said first region located at the side surfaces of said floating gate and said control gate, and said first region having a higher doping concentration than said second region.
Claim 3
Dependent Claim
30 words
A nonvolatile memory device according to claim 1, wherein said third insulating layer having a phosphorus doped layer contacting said side surfaces of said floating gate and said control gate.