Semiconductor memory which is protected from erasure by light shields
Abstract
Abstract A nonvolatile semiconductor memory device having memory cells in which a control gate is stacked on a floating gate through an insulating film. The memory device has redundant memory cells so as to compensate defective memory cells and a transistor to select the redundant memory cells and the redundant memory cells and the transistor to select the redundant memory cells are formed by a nonvolatile memory transistor. The transistor to select the redundant memory cells has a structure in which the upper surface and side walls of the floating gate are covered by a control gate or a structure in which the floating gate and control gate are covered by a light shielding film and an antireflection film formed under the light shielding film. In a nonvolatile semiconductor memory device having memory cells of a structure in which a control gate is stacked on a floating gate through an insulating film, a phosphosilicate glass film is formed on side walls of the floating gate and the control gate and a silicon nitride film and an arseno-silicate glass film or boro-phospho-silicide glass film are sequentially formed so as to cover the control gate.
Inventors
- 👤 Masanori Noda
- 👤 Akihiro Nakamura
Bibliographic Details
Claims Analysis
Total Claims: 7References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-11-25 | 1995-05-27 | 1995-11-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-25 | 1999-05-27 | 1999-11-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-25 | 2003-05-27 | 2003-11-26 | $7700.00 | Window Closed / Lapsed |