Use of oxide spacers formed by liquid phase deposition

Claim 1

A process for manufacturing a field effect transistor and connections thereto, comprising: (a) providing a structure that comprises a body of P type silicon, including field isolating regions comprised of thick layers of silicon oxide, the surface of said silicon body being covered by a thin layer of silicon oxide in the regions between said field isolating regions; (b) depositing a layer of polycrystalline silicon over said structure; (c) patterning and then etching said layer of polycrystalline silicon, down to the level of said thin layer of silicon oxide, so as to leave a gate pedestal in the region between said field isolation regions and a drain connector over a field isolation region on one side of said gate pedestal; (d) then subjecting the structure to ion implantation of N type dopant material with energies low enough for penetration to be slight, to a dosage level such that the implanted silicon becomes lightly N type; (e) protecting said drain connector with a layer of photoresist that extends into the region between said drain connector and said gate pedestal; (f) forming, through liquid phase deposition, a layer of silicon oxide that covers all areas not protected by said layer of photoresist and then removing said layer of photoresist; (g) anisotropically reactive ion etching said layer of silicon oxide, thereby forming spacers on the vertical side walls of said gate pedestal; (h) subjecting the structure to ion implantation of N type dopant material to a dosage level such that the implanted silicon becomes strongly N type; (i) removing said layer of thin oxide wherever it is uncovered; (j) coating the structure with a layer of a refractory metal; (k) heating the structure until said refractory metal has been converted to its silicide wherever it is in contact with silicon; and (l) etching the structure with an etchant that removes said refractory metal and does not remove said refractory metal silicide.