US5606188A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Fabrication process and structure for a contacted-body silicon-on-insulator dynamic random access memory
Assignee: International Business Machines Corp
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Filing: 1995-04-26
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Granted: 1997-02-25
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Expires: 2015-04-26
Abstract
Abstract An SOI DRAM includes a direct body contact between the SOI layer and the silicon substrate, and field-shield isolation positioned on the surface of the SOI structure which extends over the direct body contact. Deep trench storage capacitors are positioned adjacent the direct body contact.
Inventors
- 👤 Gary B. Bronner
- 👤 John K. DeBrosse
- 👤 Jack A. Mandelman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 09:12
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/201; H10B; H10B12/00; H10B12/30; H10B12/37; H10B12/373
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
104 words
A body-contacted silicon-on-insulator dynamic random access memory, comprising: a substrate including a silicon layer, an insulator layer positioned on said silicon layer, and a silicon-on-insulator layer positioned on said insulator layer; a conductive material contacting said silicon-on-insulator layer, said conductive material traversing through said silicon-on-insulator layer and said insulator layer and contacting said silicon layer; a field-shield isolation region positioned on a surface of said substrate above said conductive material; and deep trench storage capacitors formed in said substrate, wherein said deep trench storage capacitors are laterally adjacent and bound side edges of said conductive material contacting said silicon-on-insulator layer and said silicon layer.
Claim 2
Dependent Claim
104 words
A body-contacted silicon-on-insulator dynamic random access memory, comprising: a substrate including a silicon layer, an insulator layer positioned on said silicon layer, and a silicon-on-insulator layer positioned on said insulator layer; a conductive material contacting said silicon-on-insulator layer, said conductive material traversing through said silicon-on-insulator layer and said insulator layer and contacting said silicon layer; a field-shield isolation region positioned on a surface of said substrate above said conductive material; and deep trench storage capacitors formed in said substrate, wherein said deep trench storage capacitors are laterally adjacent and bound side edges of said conductive material contacting said silicon-on-insulator layer and said silicon layer.
Claim 3
Dependent Claim
27 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 1 further comprising an insulator layer positioned between said surface of said substrate and said field-shield isolation region.
Claim 4
Dependent Claim
27 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 1 further comprising a gate conductor positioned on said surface of said substrate adjacent said field-shield isolation region.
Claim 5
Dependent Claim
24 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 1 wherein said conductive material contacting said silicon-on-insulator layer and said silicon layer is polysilicon.
Claim 6
Dependent Claim
43 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 1 wherein said field-shield isolation region includes an insulator positioned on said surface of said substrate, a conductive field-shield material positioned on said insulator, and a protective cap positioned over said conductive field-shield material.
Claim 7
Dependent Claim
48 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 1 wherein a portion of said substrate located below said silicon layer has a first conductivity type, and said conductive material and said silicon layer both have a second conductivity type which is opposite to said first conductivity type.
Claim 8
Dependent Claim
18 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 1 wherein said silicon-on-insulator layer is a continuous layer.
Claim 9
Dependent Claim
27 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 1 wherein said deep trench storage capacitors are laterally adjacent and bound side edges of said conductive material.
Claim 10
Dependent Claim
29 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 6 wherein said substrate is an n-type material and said conductive material and said silicon layer each is P+type material.
Claim 11
Dependent Claim
45 words
A body-contacted silicon-on-insulator dynamic random access memory of claim 10 wherein said silicon layer is a region of doped silicon material located in a surface portion of said substrate, and said conductive material comprises a doped polysilicon layer located above and contacting said silicon layer.
Claim 12
Dependent Claim
28 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 10 wherein said substrate is an n-type material, and said conductive material and said silicon layer is P+type material.
Claim 13
Dependent Claim
34 words
The body-contacted silicon-on-insulator dynamic random access memory of claim 11 wherein said silicon layer is a wiring level for a body contact comprised of said contact between said conductive material and said silicon-on-insulator layer.
Claim 14
Dependent Claim
109 words
A body-contacted silicon-on-insulator dynamic random access memory , comprising: a substrate including a silicon layer an insulator layer positioned on said silicon layer, and a Silicon-on-insulator layer positioned on said insulator layer; a conductive material contacting said silicon-on, insulator layer, said conductive material traversing through said silicon-on-insulator layer and said insulator layer and contacting said silicon layer; a field-shield isolation region positioned on a surface of said substrate above said conductive material, wherein said field-shield isolation region is P+polysilicon material; and deep trench storage capacitors formed in said substrate, wherein said conductive material contacting said silicon-on-insulator layer and said silicon layer is located between said deep trench storage capacitors.
Claim 15
Dependent Claim
109 words
A body-contacted silicon-on-insulator dynamic random access memory , comprising: a substrate including a silicon layer an insulator layer positioned on said silicon layer, and a Silicon-on-insulator layer positioned on said insulator layer; a conductive material contacting said silicon-on, insulator layer, said conductive material traversing through said silicon-on-insulator layer and said insulator layer and contacting said silicon layer; a field-shield isolation region positioned on a surface of said substrate above said conductive material, wherein said field-shield isolation region is P+polysilicon material; and deep trench storage capacitors formed in said substrate, wherein said conductive material contacting said silicon-on-insulator layer and said silicon layer is located between said deep trench storage capacitors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-02-25 | 2000-08-26 | 2001-02-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-02-25 | 2004-08-26 | 2005-02-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-02-25 | 2008-08-26 | 2009-02-25 | $7700.00 | Window Closed / Lapsed |