Patent US5605856A successfully refreshed from Google Patents.
US5605856A
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US
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Method for designing an electronic integrated circuit with optical inputs and outputs
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1995-03-14
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Granted: 1997-02-25
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Expires: 2015-03-14
Abstract
Abstract A method for designing an integrated circuit having optical inputs and outputs includes the step of selecting an integrated circuit design which includes at least one circuit cell design for processing electric signals. The circuit cell design has a predetermined number of electric inputs and electric outputs. The integrated circuit design also includes a plurality of layers of metalization for providing electric coupling. After the electronic integrated circuit design is selected, a predetermined number of optical input devices are located on the circuit cell design in a first prearranged orientation. The predetermined number of optical input devices is no greater than the predetermined number of electric inputs to the circuit cell. Also after the electronic circuit design is selected, a predetermined number of optical output devices are located on the circuit cell design in a second prearranged orientation. The predetermined number of optical output devices is no greater than the predetermined number of electric outputs to the circuit cell. At least a topmost layer of metalization is selected for electrically coupling each optical input device to a distinct one of the electric inputs of the circuit cell and for electrically coupling each optical output device to a distinct one of the electric outputs of the circuit cell. Finally, the completed design for the integrated circuit with optical inputs and outputs is recorded in a memory such as an electronic storage medium.
Inventors
- 👤 Keith W. Goosen
- 👤 Fouad E. Kiamilev
- 👤 Ashok V. Krishnamoorthy
- 👤 David A. B. Miller
- 👤 James A. Walker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 21:39
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/103; H10D; H10D89/00; H10D89/10
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
196 words
A method comprising the steps of: (a) selecting an electronic integrated circuit design having at least one circuit cell design for processing electric signals, said circuit cell design having a number of electric inputs and electric outputs, said integrated circuit design further including a plurality of layers of metalization for providing electric coupling; (b) subsequent to step (a), locating a number of optical input devices on the circuit cell design in a first orientation, the number of optical input devices being no greater than the number of electric inputs to the circuit cell; (c) subsequent to step (a), locating a number of optical output devices on the circuit cell design in a second orientation, the number of optical output devices being no greater than the number of electric outputs to the circuit cell; (d) selecting at least a topmost layer of metalization for electrically coupling each optical input device to a distinct one of said electric inputs of the circuit cell and for electrically coupling each optical output device to a distinct one of said electric outputs of the circuit cell; (e) fabricating an integrated circuit with optical inputs and outputs in accordance with steps (a)-(d).
Claim 2
Independent Claim
196 words
A method comprising the steps of: (a) selecting an electronic integrated circuit design having at least one circuit cell design for processing electric signals, said circuit cell design having a number of electric inputs and electric outputs, said integrated circuit design further including a plurality of layers of metalization for providing electric coupling; (b) subsequent to step (a), locating a number of optical input devices on the circuit cell design in a first orientation, the number of optical input devices being no greater than the number of electric inputs to the circuit cell; (c) subsequent to step (a), locating a number of optical output devices on the circuit cell design in a second orientation, the number of optical output devices being no greater than the number of electric outputs to the circuit cell; (d) selecting at least a topmost layer of metalization for electrically coupling each optical input device to a distinct one of said electric inputs of the circuit cell and for electrically coupling each optical output device to a distinct one of said electric outputs of the circuit cell; (e) fabricating an integrated circuit with optical inputs and outputs in accordance with steps (a)-(d).
Claim 3
Dependent Claim
40 words
The method of claim 1 wherein the optical input devices each comprise a photodetector for convening an optical input signal to a photocurrent and a receiver circuit coupled to said photodetector for converting said photocurrent to an electric input signal.
Claim 4
Dependent Claim
45 words
The method of claim 2 wherein the optical output devices each comprise a modulator driver circuit for converting an electric output signal to a voltage signal and a modulator coupled to said modulator driver circuit for converting said voltage signal to an optical output signal.
Claim 5
Dependent Claim
14 words
The method of claim 1 wherein said first and second orientations form regular arrays.
Claim 6
Dependent Claim
34 words
The method of claim 1 wherein said electronic integrated circuit design includes a plurality of circuit cell designs, and further comprising the steps of repeating steps (b)-(d) for each of the circuit cells designs.
Claim 7
Dependent Claim
50 words
The method of claim 5 wherein said plurality of circuit cell designs form a spatially asymmetric electronic integrated circuit designs and wherein said first orientations for the circuit cell designs form a first common symmetric arrangement and said second orientations for the circuit cells form a second common symmetric arrangement.
Claim 8
Dependent Claim
17 words
The method of claim 1 wherein said plurality of layers of metalization comprise three layers of metalization.
Claim 9
Dependent Claim
29 words
The method of claim 1 wherein said selecting step comprises the step of selecting a standard electronic integrated circuit design from among a library of electronic integrated circuit designs.
Claim 10
Dependent Claim
45 words
The method of claim 1 wherein each of said electric inputs includes a receiver circuit for converting a photocurrent to an electric input signal and each of said electric outputs includes a modulator driver circuit for converting an electric output signal to a voltage signal.
Claim 11
Dependent Claim
21 words
The method of claim 9 wherein said optical input devices comprise a photodetector and said optical output devices comprise a modulator.
Claim 12
Dependent Claim
31 words
The method of claim 1 wherein the step of selecting an electronic integrated circuit design comprises the step of optimizing the integrated circuit design independent of performing steps (b) and (c).
Claim 13
Dependent Claim
45 words
The method of claim 11 wherein the optimization step comprises the step of optimizing at least one characteristic selected from the group consisting of the area of the integrated circuit, the clock frequency of the circuit cell, and the power dissipation of the circuit cell.
Claim 14
Dependent Claim
23 words
The method of claim 9 wherein said receiver circuits and said modulator driver circuits are located along a periphery of the circuit cell.
Claim 15
Dependent Claim
92 words
The method of claim 10 wherein the fabricating step comprises the steps of: fully fabricating the electronic integrated circuit; fully fabricated the number of optical input devices and optical output devices on a common substrate to form a fully fabricated optical integrated circuit; aligning said fully fabricated optical integrated circuit over said fully fabricated electronic integrated so that each of the optical input devices and optical output devices are situated over a location on the electronic integrated circuit; bonding said fully fabricated electronic integrated circuit to said fully fabricated optical integrated circuit.
Claim 16
Dependent Claim
32 words
The method of claim 14 further comprising the steps of: bonding at least one optical input device to a location on the fully fabricated electronic integrated circuit situated over active electronic circuitry.
Claim 17
Dependent Claim
32 words
The method of claim 14 further comprising the steps of: bonding at least one optical output device to a location on the fully fabricated electronic integrated circuit situated over active electronic circuitry.
Claim 18
Dependent Claim
14 words
The method of claim 1 wherein said circuit cell design is a pixel design.
Claim 19
Dependent Claim
17 words
The method of claim 1 wherein said circuit cell design is a First-In First-Out memory buffer design.
Claim 20
Dependent Claim
17 words
The method of claim 10 wherein said photodetectors and said modulators are multiple quantum well p-i-n diodes.
Claim 21
Dependent Claim
23 words
The method of claim 10 wherein said photodetectors are multiple quantum well p-i-n diodes and said modulators are vertical cavity surface emitting lasers.
Claim 22
Dependent Claim
20 words
The method of claim 10 wherein said photodetectors are silicon diodes and said modulators are multiple quantum well p-i-n diodes.
Claim 23
Dependent Claim
20 words
The method of claim 10 wherein said photodetectors are metal-semiconductor-metal devices and said modulators are vertical cavity surface emitting lasers.
Claim 24
Dependent Claim
20 words
The method of claim 10 wherein said photodetectors are metal-semiconductormetal devices and said modulators are multiple quantum well p-i-n diodes.
Claim 25
Independent Claim
214 words
A method comprising the steps of: (a) selecting an electronic integrated circuit design having a plurality of circuit cell designs for processing electric signals, said circuit cell designs being different from one another such that the electronic integrated circuit is asymmetrically distributed over its surface, said integrated circuit having a number of electric inputs and electric outputs and including a plurality of layers of metalization for providing electric coupling; (b) locating a number of optical input devices on the plurality of circuit cell designs in a first symmetric arrangement, the number of optical input devices being no greater than the number of electric inputs to the electronic integrated circuit; (c) locating a number of optical output devices on the plurality of circuit cell designs in a second symmetric orientation, the number of optical output devices being no greater than the number of electric outputs to the electronic integrated circuit; (d) selecting at least a topmost layer of metalization for electrically coupling each optical input device to a distinct one of said electric inputs of the electronic integrated circuit and for electrically coupling each optical output device to a distinct one of said electric outputs of the electronic integrated circuit; (e) fabricating an integrated circuit with optical inputs and outputs in accordance with steps (a)-(d).
Claim 26
Independent Claim
214 words
A method comprising the steps of: (a) selecting an electronic integrated circuit design having a plurality of circuit cell designs for processing electric signals, said circuit cell designs being different from one another such that the electronic integrated circuit is asymmetrically distributed over its surface, said integrated circuit having a number of electric inputs and electric outputs and including a plurality of layers of metalization for providing electric coupling; (b) locating a number of optical input devices on the plurality of circuit cell designs in a first symmetric arrangement, the number of optical input devices being no greater than the number of electric inputs to the electronic integrated circuit; (c) locating a number of optical output devices on the plurality of circuit cell designs in a second symmetric orientation, the number of optical output devices being no greater than the number of electric outputs to the electronic integrated circuit; (d) selecting at least a topmost layer of metalization for electrically coupling each optical input device to a distinct one of said electric inputs of the electronic integrated circuit and for electrically coupling each optical output device to a distinct one of said electric outputs of the electronic integrated circuit; (e) fabricating an integrated circuit with optical inputs and outputs in accordance with steps (a)-(d).
Claim 27
Independent Claim
202 words
A method comprising the steps of: (a) selecting an electronic integrated circuit design having at least one circuit cell design for processing electric signals, said circuit cell design having a number of electric inputs and electric outputs, said integrated circuit design further including a plurality of layers of metalization for providing electric coupling; (b) subsequent to step (a), locating a number of optical input devices on the circuit cell design in a first orientation, the number of optical input devices being no greater than the number of electric inputs to the circuit cell; (c) subsequent to step (a), locating a number of optical output devices on the circuit cell design in a second orientation, the number of optical output devices being no greater than the number of electric outputs to the circuit cell; (d) selecting at least a topmost layer of metalization for electrically coupling each optical input device to a distinct one of said electric inputs of the circuit cell and for electrically coupling each optical output device to a distinct one of said electric outputs of the circuit cell; (e) recording in a memory a design for an integrated circuit with optical inputs and outputs in accordance with steps (a)-(d).
Claim 28
Independent Claim
202 words
A method comprising the steps of: (a) selecting an electronic integrated circuit design having at least one circuit cell design for processing electric signals, said circuit cell design having a number of electric inputs and electric outputs, said integrated circuit design further including a plurality of layers of metalization for providing electric coupling; (b) subsequent to step (a), locating a number of optical input devices on the circuit cell design in a first orientation, the number of optical input devices being no greater than the number of electric inputs to the circuit cell; (c) subsequent to step (a), locating a number of optical output devices on the circuit cell design in a second orientation, the number of optical output devices being no greater than the number of electric outputs to the circuit cell; (d) selecting at least a topmost layer of metalization for electrically coupling each optical input device to a distinct one of said electric inputs of the circuit cell and for electrically coupling each optical output device to a distinct one of said electric outputs of the circuit cell; (e) recording in a memory a design for an integrated circuit with optical inputs and outputs in accordance with steps (a)-(d).
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2000-02-25 | 2000-08-26 | 2001-02-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-02-25 | 2004-08-26 | 2005-02-25 | $3760.00 | Window Closed / Lapsed |
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