Low voltage triggering silicon controlled rectifier structures for ESD protection

Claim 2

A silicon controlled rectifier (SCR) structure formed in a semiconductor substrate and utilizable for electrostatic discharge protection, the SCR structure comprising: a first well of a first conductivity type formed in the semiconductor substrate; a second well of a second conductivity type formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped region of the first conductivity type formed in the first well; a second heavily doped region of the second conductivity type formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped region of the first conductivity type formed in the second well; a fourth heavily doped region of the second conductivity type formed to span the first junction between the first and second wells; a first lightly doped region of the first conductivity type formed in the first well between the second heavily doped region and the fourth heavily doped region; a second lightly doped region of the first conductivity type formed in the second well between the third heavily doped region and the fourth heavily doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; a conductive cathode formed over the third heavily doped region and in electrical contact therewith.

Claim 3

A silicon controlled rectifier (SCR) structure formed in a semiconductor substrate and utilizable for electrostatic discharge protection, the SCR structure comprising: a first well of a first conductivity type formed in the semiconductor substrate; a second well of a second conductivity type formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped region of the first conductivity type formed in the first well; a second heavily doped region of the second conductivity type formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped region of the first conductivity type formed in the second well; a first lightly doped region of the second conductivity type formed to span the first junction between the first and second wells; a second lightly doped region of the first conductivity type formed in the first well between the second heavily doped region and the first lightly doped region; a third lightly doped region of the first conductivity type formed in the second well between the third heavily doped region and the first lightly doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; and a conductive cathode formed over the third heavily doped region and in electrical contact therewith.

Claim 4

A silicon controlled rectifier (SCR) structure formed in a semiconductor substrate and utilizable for electrostatic discharge protection, the SCR structure comprising: a first well of a first conductivity type formed in the semiconductor substrate; a second well of a second conductivity type formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped region of the first conductivity type formed in the first well; a second heavily doped region of the second conductivity type formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped region of the first conductivity type formed in the second well; a first lightly doped region of the second conductivity type formed to span the first junction between the first and second wells; a second lightly doped region of the first conductivity type formed in the first well between the second heavily doped region and the first lightly doped region; a third lightly doped region of the first conductivity type formed in the second well between the third heavily doped region and the first lightly doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; and a conductive cathode formed over the third heavily doped region and in electrical contact therewith.

Claim 5

A triac structure formed in a semiconductor substrate and utilizable for electrostatic discharge protection, the triac structure comprising: (a) a first silicon controlled rectifier (SCR) structure that includes a first well of n-type conductivity formed in the semiconductor substrate; a second well of p-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped n+ region formed in the first well; a second heavily doped p+ region formed in the first well adjacent to the first heavily doped n+ region to define a second junction between the first and second heavily doped regions; a third heavily doped n+ region formed in the second well; a fourth heavily doped p+ region formed to span the first junction between the first and second wells; a first nLDD region formed in the first well between the second heavily doped region and the fourth heavily doped region; a second nLDD region formed in the second well between the third heavily doped region and the fourth heavily doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; a conductive cathode formed over the third heavily doped region and in electrical contact therewith; and (b) a second silicon controlled rectifier (SCR) structure that includes a first well of p-type conductivity formed in the semiconductor substrate; a second well of n-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped p+ region formed in the first well; a second heavily doped n+ region formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped p+ region formed in the second well; a fourth heavily doped n+ region formed to span the first junction between the first and second wells; a first pLDD region formed in the first well between the second heavily doped region and the fourth heavily doped region; a second pLDD region of the first conductivity type formed in the second well between the third heavily doped region and the fourth heavily doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; and a conductive cathode formed over the third heavily doped region and in electrical contact therewith.

Claim 6

A triac structure formed in a semiconductor substrate and utilizable for electrostatic discharge protection, the triac structure comprising: (a) a first silicon controlled rectifier (SCR) structure that includes a first well of n-type conductivity formed in the semiconductor substrate; a second well of p-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped n+ region formed in the first well; a second heavily doped p+ region formed in the first well adjacent to the first heavily doped n+ region to define a second junction between the first and second heavily doped regions; a third heavily doped n+ region formed in the second well; a fourth heavily doped p+ region formed to span the first junction between the first and second wells; a first nLDD region formed in the first well between the second heavily doped region and the fourth heavily doped region; a second nLDD region formed in the second well between the third heavily doped region and the fourth heavily doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; a conductive cathode formed over the third heavily doped region and in electrical contact therewith; and (b) a second silicon controlled rectifier (SCR) structure that includes a first well of p-type conductivity formed in the semiconductor substrate; a second well of n-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped p+ region formed in the first well; a second heavily doped n+ region formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped p+ region formed in the second well; a fourth heavily doped n+ region formed to span the first junction between the first and second wells; a first pLDD region formed in the first well between the second heavily doped region and the fourth heavily doped region; a second pLDD region of the first conductivity type formed in the second well between the third heavily doped region and the fourth heavily doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; and a conductive cathode formed over the third heavily doped region and in electrical contact therewith.

Claim 7

A triac structure formed in a semiconductor substrate and utilizable for electrostatic discharge protection, the triac structure comprising: (a) a first silicon controlled rectifier (SCR) structure that includes a first well of n-type conductivity formed in the semiconductor substrate; a second well of p-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped n+ region formed in the first well; a second heavily doped p+ region formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped n+ region formed in the second well; a first pLDD region formed to span the first junction between the first and second wells; a second nLDD region formed in the first well between the second heavily doped region and the first pLDD region; a third nLDD region formed in the second well between the third heavily doped region and the first pLDD region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; a conductive cathode formed over the third heavily doped region and in electrical contact therewith; and (b) a second silicon controlled rectifier (SCR) structure that includes a first well of p-type conductivity formed in the semiconductor substrate; a second well of n-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped p+ region formed in the first well; a second heavily doped n+ region formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped p+ region formed in the second well; a first nLDD region formed to span the first junction between the first and second wells; a second pLDD region formed in the first well between the second heavily doped region and the first nLDD region; a third lightly doped region of the first conductivity type formed in the second well between the third heavily doped region and the first lightly doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; and a conductive cathode formed over the third heavily doped region and in electrical contact therewith.

Claim 8

A triac structure formed in a semiconductor substrate and utilizable for electrostatic discharge protection, the triac structure comprising: (a) a first silicon controlled rectifier (SCR) structure that includes a first well of n-type conductivity formed in the semiconductor substrate; a second well of p-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped n+ region formed in the first well; a second heavily doped p+ region formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped n+ region formed in the second well; a first pLDD region formed to span the first junction between the first and second wells; a second nLDD region formed in the first well between the second heavily doped region and the first pLDD region; a third nLDD region formed in the second well between the third heavily doped region and the first pLDD region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; a conductive cathode formed over the third heavily doped region and in electrical contact therewith; and (b) a second silicon controlled rectifier (SCR) structure that includes a first well of p-type conductivity formed in the semiconductor substrate; a second well of n-type conductivity formed in the semiconductor substrate adjacent to the first well to define a first junction between the first and second wells; a first heavily doped p+ region formed in the first well; a second heavily doped n+ region formed in the first well adjacent to the first heavily doped region to define a second junction between the first and second heavily doped regions; a third heavily doped p+ region formed in the second well; a first nLDD region formed to span the first junction between the first and second wells; a second pLDD region formed in the first well between the second heavily doped region and the first nLDD region; a third lightly doped region of the first conductivity type formed in the second well between the third heavily doped region and the first lightly doped region; a conductive anode formed over the second junction between the first and second heavily doped regions and in electrical contact therewith; and a conductive cathode formed over the third heavily doped region and in electrical contact therewith.