US5599736A — Fabrication method for polysilicon contact plugs

Claim 1

Independent Claim 266 words

A method for fabricating a MOSFET device on a semiconductor substrate, using a conductive plug to provide electrical contact between an active device region in said semiconductor substrate, and the interconnect metallization, comprising the steps of: providing said MOSFET device, on said semiconductor substrate; providing said active device region in said MOSFET device; depositing a first dielectric layer on said semiconductor substrate, including said MOSFET device; depositing a second dielectric layer on said first dielectric layer, to form composite dielectric layer; photolithographic processing to open a region in photoresist, exposing said composite dielectric layer, directly overlying said active device region; anisotropic removal of said composite dielectric layer, in said open region of said photoresist, to create a contact hole to said active device region; cleaning surface of said active device region, in said contact hole opening; depositing an intrinsic layer of polysilicon on said active device region, in said contact hole, and on said second dielectric layer; a first doping of said intrinsic polysilicon layer; a first anneal to completely convert said intrinsic polysilicon layer, on said second dielectric layer, to doped polysilicon, while converting a top portion of said intrinsic polysilicon layer, in said contact hole, to said doped polysilicon; removal of said doped polysilicon, from surface of said second dielectric layer, and from surface of said intrinsic polysilicon layer, in said contact hole; removal of said second dielectric layer from surface of said first dielectric layer; a second doping of said intrinsic polysilicon layer, in said contact hole; and a second anneal to activate dopants in said intrinsic polysilicon layer, in said contact hole.

Claim 2

Independent Claim 266 words

A method for fabricating a MOSFET device on a semiconductor substrate, using a conductive plug to provide electrical contact between an active device region in said semiconductor substrate, and the interconnect metallization, comprising the steps of: providing said MOSFET device, on said semiconductor substrate; providing said active device region in said MOSFET device; depositing a first dielectric layer on said semiconductor substrate, including said MOSFET device; depositing a second dielectric layer on said first dielectric layer, to form composite dielectric layer; photolithographic processing to open a region in photoresist, exposing said composite dielectric layer, directly overlying said active device region; anisotropic removal of said composite dielectric layer, in said open region of said photoresist, to create a contact hole to said active device region; cleaning surface of said active device region, in said contact hole opening; depositing an intrinsic layer of polysilicon on said active device region, in said contact hole, and on said second dielectric layer; a first doping of said intrinsic polysilicon layer; a first anneal to completely convert said intrinsic polysilicon layer, on said second dielectric layer, to doped polysilicon, while converting a top portion of said intrinsic polysilicon layer, in said contact hole, to said doped polysilicon; removal of said doped polysilicon, from surface of said second dielectric layer, and from surface of said intrinsic polysilicon layer, in said contact hole; removal of said second dielectric layer from surface of said first dielectric layer; a second doping of said intrinsic polysilicon layer, in said contact hole; and a second anneal to activate dopants in said intrinsic polysilicon layer, in said contact hole.

Claim 3

Dependent Claim 24 words

The method of claim 1, wherein said active device region, of said MOSFET device, in said semiconductor substrate, is an N type doped region.

Claim 4

Dependent Claim 35 words

The method of claim 1, wherein said first dielectric layer is silicon dioxide, deposited using LPCVD processing, at a temperature between about 400° and 800° C., to a thickness between about 6000 and 12000 Angstroms.

Claim 5

Dependent Claim 35 words

The method of claim 1, wherein said second dielectric layer is silicon nitride, deposited using LPCVD processing, at a temperature between about 600° and 800° C., to a thickness between about 500 and 3000 Angstroms.

Claim 6

Dependent Claim 33 words

The method of claim 1, wherein said contact hole is created via anisotropic RIE removal of said silicon nitride layer, using C12, while said first dielectric layer is removed using a CF4-CHF3 chemistry.

Claim 7

Dependent Claim 33 words

The method of claim 1, wherein said intrinsic polysilicon layer is deposited using LPCVD processing, at a temperature between about 500° and 700° C., to a thickness between about 1000 and 4000 Angstroms.

Claim 8

Dependent Claim 39 words

The method of claim 1, wherein said first doping, of said intrinsic polysilicon layer, is performed via ion implantation of arsenic, at an energy between about 30 and 100 Kev., at a dose between about 2E15 and 2E16 atoms/cm2.

Claim 9

Dependent Claim 28 words

The method of claim 1, wherein said first doping, of said intrinsic polysilicon layer, is performed via POC13 processing, at a temperature between about 850° and 950° C.

Claim 10

Dependent Claim 33 words

The method of claim 1, wherein said first anneal is performed at a temperature between about 800° and 900° C., for a time between about 10 and 40 min, in a nitrogen ambient.

Claim 11

Dependent Claim 25 words

The method of claim 1, wherein said doped polysilicon is removed using a phosphoric acid solution, at a temperature between about 160° and 180° C.

Claim 12

Dependent Claim 39 words

The method of claim 1, wherein said intrinsic polysilicon layer, in said contact hole, is doped via ion implantation of arsenic, at an energy between about 50 and 100 Kev., at a dose between about 1E15 and 3E16 atoms/cm2.

Claim 13

Dependent Claim 24 words

The method of claim 1, wherein said second anneal is performed in a nitrogen ambient, at a temperature between about 800° and 900° C.

Claim 14

Independent Claim 274 words

A method for fabricating a MOSFET device on a semiconductor substrate, using a polysilicon plug to provide electrical contact between a source and drain device region, in said semiconductor substrate, and an interconnect metallization, comprising the steps of: providing said MOSFET device on said semiconductor substrate; providing said source and drain device regions in said MOSFET device; depositing a silicon oxide layer on said semiconductor substrate, including said MOSFET device; depositing a silicon nitride layer on said silicon oxide layer, to form composite dielectric layer; photolithographic processing to open a region in photoresist, exposing said composite dielectric layer, directly overlying said source and drain device regions; anisotropic removal of said composite dielectric layer, in said open region of said photoresist, to create a contact hole to said source and drain device regions; cleaning surface of said source and drain device regions, in said contact hole; depositing an intrinsic polysilicon layer on said source and drain device regions, in said contact hole, and on said silicon nitride layer; depositing an insitu doped polysilicon layer on said intrinsic polysilicon layer; a first anneal to completely convert intrinsic polysilicon layer, on said silicon nitride layer, to doped polysilicon, while converting a top portion of said intrinsic polysilicon, in said contact hole, to said doped polysilicon; removal of said doped polysilicon, from surface of said silicon nitride layer, and from surface of intrinsic polysilicon layer, in said contact hole; removal of said silicon nitride layer from surface of said silicon oxide layer; doping of said intrinsic polysilicon layer, in said contact hole; and a second anneal to activate dopants in said intrinsic polysilicon layer, in said contact hole.

Claim 15

Independent Claim 274 words

A method for fabricating a MOSFET device on a semiconductor substrate, using a polysilicon plug to provide electrical contact between a source and drain device region, in said semiconductor substrate, and an interconnect metallization, comprising the steps of: providing said MOSFET device on said semiconductor substrate; providing said source and drain device regions in said MOSFET device; depositing a silicon oxide layer on said semiconductor substrate, including said MOSFET device; depositing a silicon nitride layer on said silicon oxide layer, to form composite dielectric layer; photolithographic processing to open a region in photoresist, exposing said composite dielectric layer, directly overlying said source and drain device regions; anisotropic removal of said composite dielectric layer, in said open region of said photoresist, to create a contact hole to said source and drain device regions; cleaning surface of said source and drain device regions, in said contact hole; depositing an intrinsic polysilicon layer on said source and drain device regions, in said contact hole, and on said silicon nitride layer; depositing an insitu doped polysilicon layer on said intrinsic polysilicon layer; a first anneal to completely convert intrinsic polysilicon layer, on said silicon nitride layer, to doped polysilicon, while converting a top portion of said intrinsic polysilicon, in said contact hole, to said doped polysilicon; removal of said doped polysilicon, from surface of said silicon nitride layer, and from surface of intrinsic polysilicon layer, in said contact hole; removal of said silicon nitride layer from surface of said silicon oxide layer; doping of said intrinsic polysilicon layer, in said contact hole; and a second anneal to activate dopants in said intrinsic polysilicon layer, in said contact hole.

Claim 16

Dependent Claim 17 words

The method of claim 13, wherein said source and drain device regions, are N type doped regions.

Claim 17

Dependent Claim 33 words

The method of claim 13, wherein said silicon oxide layer is grown using LPCVD processing, at a temperature between about 400° and 800° C., to a thickness between about 6000 and 12000 angstroms.

Claim 18

Dependent Claim 31 words

The method of claim 13, wherein said silicon nitride is grown using LPCVD processing, at a temperature between about 600° and 800° C., to thickness between about 500 and 3000 Angstroms.

Claim 19

Dependent Claim 37 words

The method of claim 13, wherein said contact hole, to said source and drain device regions, is created via RIE processing, using C12 for said silicon nitride layer, and a CF4-CHF3 chemistry for said silicon oxide layer.

Claim 20

Dependent Claim 33 words

The method of claim 13, wherein said intrinsic polysilicon layer is deposited using LPCVD processing, at a temperature between about 500° and 700° C., to a thickness between about 1000 and 4000 Angstroms.

Claim 21

Dependent Claim 52 words

The method of claim 13, wherein said insitu doped polysilicon layer is deposited using LPCVD processing, at a temperature between about 500° and 700° C., to a thickness between about 1000 and 4000 Angstroms, using between about 1200 and 1400 sccm of SiH4, and between about 100 and 300 sccm of PH3.

Claim 22

Dependent Claim 33 words

The method of claim 13, wherein said first anneal is performed in a nitrogen ambient, at a temperature between about 800° and 900° C., for a time between about 10 and 40 min.

Claim 23

Dependent Claim 25 words

The method of claim 13, wherein said doped polysilicon is removed using a phosphoric acid solution, at a temperature between about 160° and 180° C.

Claim 24

Dependent Claim 39 words

The method of claim 13, wherein said intrinsic polysilicon layer, in said contact hole, is doped via ion implantation of arsenic, at an energy between about 50 and 100 Kev., at a dose between about 1E15 and 3E16 atoms/cm2.

Claim 25

Dependent Claim 24 words

The method of claim 13, wherein said second anneal is performed in an nitrogen ambient, at a temperature between about 800° and 900° C.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2000-02-04	2000-08-05	2001-02-04	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2004-02-04	2004-08-05	2005-02-04	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2008-02-04	2008-08-05	2009-02-04	$7700.00	Window Closed / Lapsed

Fabrication method for polysilicon contact plugs

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