US5598096A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for testing an integrated circuit using controlled wirebonding and wirebonding removal
Assignee: Visteon Global Technologies Inc
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Filing: 1994-12-02
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Granted: 1997-01-28
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Expires: 2014-12-02
Abstract
Abstract An apparatus for testing an integrated circuit includes a bond substrate having a location for an integrated circuit. The location on the bond substrate has a plurality of traces around each location. A first fixture holds the bond substrate in a fixed relation to first fixture and holds the integrated circuit in a fixed relation to the first fixture and the bond substrate. A wirebonder forms wirebonds between the traces and the bond pads. An electrical tester provides electrical signals from the traces to the bond pads to verifying the operation of the integrated circuit. A second fixture lifts the bond substrate while the integrated circuit remains held to the first fixture. A vibrator vibrates the first fixture in relation to the second fixture so that the wirebonds are broken at a predetermined location near the bond pad.
Inventors
- 👤 Cuong V. Pham
- 👤 Brian J. Hayden
- 👤 Bethany J. Walles
- 👤 Peter R. Cibirka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 06:34
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R31/00; G01R31/28; G01R31/2851; G01R31/2886; H; H10; H10W; H10W72/00; H10W72/071; H10W72/075; H10W72/07531; H10W72/50; H10W72/531; H10W72/536
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
141 words
An apparatus for testing an integrated circuit having a plurality of bond pads comprising: a bond substrate having a location for an integrated circuit, said location having a plurality of traces around said location; a first fixture holding said bond substrate in a fixed relation to first fixture and holding said integrated circuit in a fixed relation to said first fixture and said bond substrate; wirebonding means for forming wirebonds between said traces to said bond pads; testing means for providing electrical signals from said traces to said bond pads for verifying said integrated circuit; a second fixture for lifting said bond substrate while said integrated circuit remains held to said first fixture; and vibration means for vibrating one of said first fixture or said second fixture so that said wirebonds are broken at a predetermined location near said bond pad.
Claim 2
Independent Claim
141 words
An apparatus for testing an integrated circuit having a plurality of bond pads comprising: a bond substrate having a location for an integrated circuit, said location having a plurality of traces around said location; a first fixture holding said bond substrate in a fixed relation to first fixture and holding said integrated circuit in a fixed relation to said first fixture and said bond substrate; wirebonding means for forming wirebonds between said traces to said bond pads; testing means for providing electrical signals from said traces to said bond pads for verifying said integrated circuit; a second fixture for lifting said bond substrate while said integrated circuit remains held to said first fixture; and vibration means for vibrating one of said first fixture or said second fixture so that said wirebonds are broken at a predetermined location near said bond pad.
Claim 3
Dependent Claim
32 words
An apparatus for testing an integrated circuit as recited in claim 1 further comprising first vacuum means connected to said first fixture for selectively holding said bond substrate and said integrated circuit.
Claim 4
Dependent Claim
27 words
An apparatus for testing an integrated circuit as recited in claim 1 further comprising second vacuum means connected to said first fixture for holding said bond substrate.
Claim 5
Dependent Claim
21 words
An apparatus for testing an integrated circuit as recited in claim 1 wherein said first fixture having an integrated circuit cavity.
Claim 6
Dependent Claim
19 words
An apparatus for testing an integrated circuit as recited in claim 1 wherein said first fixture is thermally conductive.
Claim 7
Dependent Claim
18 words
An apparatus for testing an integrated circuit as recited in claim 1 wherein said first fixture is aluminum.
Claim 8
Dependent Claim
19 words
An apparatus for testing an integrated circuit as recited in claim 1 wherein said vibration means includes a transducer.
Claim 9
Dependent Claim
23 words
An apparatus for testing an integrated circuit as recited in claim 1 wherein said location is a hole larger than the integrated circuit.
Claim 10
Dependent Claim
26 words
An apparatus for testing an integrated circuit as recited in claim 8 wherein said hole is about 20 to 40 mils larger than said integrated circuit.
Claim 11
Dependent Claim
39 words
An apparatus for testing an integrated circuit as recited in claim 8 wherein said hole having a depth and wherein said integrated circuit has a thickness, said depth of said hole is substantially said thickness of said integrated circuit.
Claim 12
Independent Claim
174 words
A method of testing integrated circuits using a bond substrate having at least one hole with a plurality of traces around each hole, said method comprising the steps of: aligning said bond substrate on a first fixture; fixedly holding said bond substrate to said first fixture; placing an integrated circuit having a plurality of bond pads into said hole on said bond substrate; holding said integrated circuit to said first fixture; forming wirebonds between said bond pads and said bond substrate; verifying said integrated circuit by passing electrical signals between said traces of said bond substrate and said bond pads; aligning a vacuum over said bond substrate; releasing said bond substrate from said first fixture while holding said bond substrate with said fixture while continuously holding said integrated circuit to said first fixture; lifting said bond substrate from said first fixture a predetermined distance without breaking said wirebonds; and vibrating either said first fixture or said vacuum fixture; uniformly breaking said wirebonds thereby leaving uniform bumps on said bond pads of said integrated circuits.
Claim 13
Independent Claim
174 words
A method of testing integrated circuits using a bond substrate having at least one hole with a plurality of traces around each hole, said method comprising the steps of: aligning said bond substrate on a first fixture; fixedly holding said bond substrate to said first fixture; placing an integrated circuit having a plurality of bond pads into said hole on said bond substrate; holding said integrated circuit to said first fixture; forming wirebonds between said bond pads and said bond substrate; verifying said integrated circuit by passing electrical signals between said traces of said bond substrate and said bond pads; aligning a vacuum over said bond substrate; releasing said bond substrate from said first fixture while holding said bond substrate with said fixture while continuously holding said integrated circuit to said first fixture; lifting said bond substrate from said first fixture a predetermined distance without breaking said wirebonds; and vibrating either said first fixture or said vacuum fixture; uniformly breaking said wirebonds thereby leaving uniform bumps on said bond pads of said integrated circuits.
Claim 14
Dependent Claim
19 words
A method of testing integrated circuits as recited in claim 11 wherein said steps of holding include vacuum holding.
Claim 15
Dependent Claim
23 words
A method of testing integrated circuits as recited in claim 11 wherein said steps of vibrating is comprised of moving said first fixture.
Claim 16
Dependent Claim
20 words
A method of testing integrated circuits as recited in claim 11 further comprising the steps of heating said first fixture.
Claim 17
Dependent Claim
22 words
A method of testing integrated circuits as recited in claim 11 wherein said location is a hole larger than the integrated circuit.
Claim 18
Independent Claim
129 words
An apparatus for testing an integrated circuit having a plurality of bond pads comprising: a bond substrate having a plurality of traces; a first vacuum fixture holding said bond substrate in a fixed relation to first fixture and holding said integrated circuit in a fixed relation to said first fixture and said bond substrate; wirebonding means for forming wirebonds between said traces to said bond pads; testing means for providing electrical signals from said traces to said bond pads for verifying said integrated circuit; a second vacuum fixture for lifting said bond substrate while said integrated circuit remains held to said first fixture; and vibration means for vibrating said first fixture or said second fixture so that said wirebonds are broken at a predetermined location near said bond pad.
Claim 19
Independent Claim
129 words
An apparatus for testing an integrated circuit having a plurality of bond pads comprising: a bond substrate having a plurality of traces; a first vacuum fixture holding said bond substrate in a fixed relation to first fixture and holding said integrated circuit in a fixed relation to said first fixture and said bond substrate; wirebonding means for forming wirebonds between said traces to said bond pads; testing means for providing electrical signals from said traces to said bond pads for verifying said integrated circuit; a second vacuum fixture for lifting said bond substrate while said integrated circuit remains held to said first fixture; and vibration means for vibrating said first fixture or said second fixture so that said wirebonds are broken at a predetermined location near said bond pad.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-01-28 | 2000-07-29 | 2001-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-01-28 | 2004-07-29 | 2005-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-01-28 | 2008-07-29 | 2009-01-28 | $7700.00 | Window Closed / Lapsed |