Patent US5592391A successfully refreshed from Google Patents.
US5592391A
Expired / Lapsed
US
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Faraday cage for a printed circuit card
Assignee: GlobalFoundries Inc
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Filing: 1995-06-07
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Granted: 1997-01-07
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Expires: 2015-06-07
Abstract
Abstract In a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers, a Faraday cage is constructed including a first and a second ground plane disposed in a first and second conductor layer respectively. The ground planes being electrically interconnected at their peripheries, preferably by a plurality of vias. A third conductor layer is disposed between the first and second conductor layers in which a plurality of signal paths are defined. The Faraday cage surrounds a shielded portion of the third conductor layer so that electrical signals conducted through the shielded portion are isolated from electrical noise. The invention finds particular application in a mixed digital/analog board separated into a digital section of the board having a digital ground plane defined in one of the conductor layers and a plurality of digital signal paths defined in another of the conductor layers and an analog section of the board having the Faraday cage and the shielded portion. Thus, the plurality of signal paths in the shielded region are intended for analog signals which are sensitive to digital noise. Additional conductor layers in the analog section can be added inside and outside the Faraday cage. Those analog signal paths located outside the cage are defined for analog signals which are less sensitive than analog signals in the shielded region. The board may be an audio card for a digital computer.
Inventors
- 👤 Jorge E. Muyshondt
- 👤 Gary A. Parker
- 👤 Bruce J. Wilkie
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 10:37
CPC Classifications
H; H05; H05K; H05K9/00; H05K9/0007; H05K9/002; H05K9/0039; H05K1/00; H05K1/02; H05K1/0213; H05K1/0216; H05K1/0218; H05K2201/00; H05K2201/07; H05K2201/0707; H05K2201/0715; H05K2201/09; H05K2201/09209; H05K2201/0929; H05K2201/093
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
189 words
A printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers comprising: a first section of the board including a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions forming a Faraday cage, wherein the Faraday cage is formed entirely within the printed circuit board and a third conductor layer disposed between the first and second ground planes in which a first plurality of signal paths for a first type of active device are defined and are substantially surrounded by the Faraday cage, at least one first type of active device attached to the first section of the board; and a second section of the board separately grounded from the first section in which a second plurality of signal paths for a second type of active device are defined, at least one second type of active device attached to the second section of the board; the first plurality of signal paths protected by the Faraday cage from signals on the second plurality of signal paths.
Claim 2
Dependent Claim
189 words
A printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers comprising: a first section of the board including a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions forming a Faraday cage, wherein the Faraday cage is formed entirely within the printed circuit board and a third conductor layer disposed between the first and second ground planes in which a first plurality of signal paths for a first type of active device are defined and are substantially surrounded by the Faraday cage, at least one first type of active device attached to the first section of the board; and a second section of the board separately grounded from the first section in which a second plurality of signal paths for a second type of active device are defined, at least one second type of active device attached to the second section of the board; the first plurality of signal paths protected by the Faraday cage from signals on the second plurality of signal paths.
Claim 3
Dependent Claim
38 words
The board as recited in claim 1 wherein the ground planes in the Faraday cage are interconnected at selected peripheral regions by a plurality of vias which substantially encircle an area of the second section of the board.
Claim 4
Dependent Claim
56 words
The board as recited in claim 1 wherein the board further comprises a fourth conductor layer in the first section and outside the Faraday cage in which signal paths are defined for the first type of active device intended for signals which are less sensitive than signals which use the signal paths in the Faraday cage.
Claim 5
Independent Claim
186 words
A method of operating a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers, comprising the steps of: in a first section of the board, grounding a Faraday cage disposed entirely within the printed circuit board including a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions by a plurality of vias; transmitting electrical signals from a first type of active device through a plurality of signal paths in a third conductor layer disposed between the first and second ground planes and substantially surrounded by the Faraday cage, the electrical signals from the first type of active device sensitive to emissions created by signals from a second type of a second active device; and transmitting electrical signals from a second type of active device through a second, separately grounded section of the board; wherein the electrical signals from the first type of active device are protected by the Faraday cage from the emissions created by the second type of electrical device.
Claim 6
Independent Claim
186 words
A method of operating a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers, comprising the steps of: in a first section of the board, grounding a Faraday cage disposed entirely within the printed circuit board including a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions by a plurality of vias; transmitting electrical signals from a first type of active device through a plurality of signal paths in a third conductor layer disposed between the first and second ground planes and substantially surrounded by the Faraday cage, the electrical signals from the first type of active device sensitive to emissions created by signals from a second type of a second active device; and transmitting electrical signals from a second type of active device through a second, separately grounded section of the board; wherein the electrical signals from the first type of active device are protected by the Faraday cage from the emissions created by the second type of electrical device.
Claim 7
Dependent Claim
23 words
The method as recited in claim 4 wherein the plurality of vias substantially encircle an area of the first section of the board.
Claim 8
Dependent Claim
57 words
The method as recited in claim 4 further comprising the step of transmitting electrical signals from the first type of active device in signal paths defined in a fourth conductor layer in the first section and outside the Faraday cage which are less sensitive to emissions than signals which use the signal paths in the Faraday cage.
Claim 9
Independent Claim
172 words
A method of manufacturing a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers comprising: in a first section of the board; providing a first and a second ground plane in a first and second conductor layer respectively; providing a first plurality of signal paths for a first type of active device in a third conductor layer disposed between the first and second conductor layers; connecting the first and second ground planes at selected peripheral regions with plurality of conductive vias which substantially encircle an area of the first, so that a portion of the third conductor layer is shielded by a Faraday cage formed by the first and second ground plane and the plurality of conductive vias; in a second section of the board: providing a third ground plane in a fourth conductor layer, separately grounded from the first and second ground planes, providing a second plurality of signal paths for a second type of active device in a fifth conductor layer.
Claim 10
Independent Claim
172 words
A method of manufacturing a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers comprising: in a first section of the board; providing a first and a second ground plane in a first and second conductor layer respectively; providing a first plurality of signal paths for a first type of active device in a third conductor layer disposed between the first and second conductor layers; connecting the first and second ground planes at selected peripheral regions with plurality of conductive vias which substantially encircle an area of the first, so that a portion of the third conductor layer is shielded by a Faraday cage formed by the first and second ground plane and the plurality of conductive vias; in a second section of the board: providing a third ground plane in a fourth conductor layer, separately grounded from the first and second ground planes, providing a second plurality of signal paths for a second type of active device in a fifth conductor layer.
Claim 11
Dependent Claim
55 words
The method as recited in claim 7 further comprising the step of providing a third plurality of signal paths in sixth conductor layer in the first section outside the Faraday cage for signals of the first type of active device which are less sensitive than signals which use the signal paths in the Faraday cage.
References Cited (Backward Citations)
US4593813A
Cited
US5006788A
Cited
US5023753A
Cited
US5025116A
Cited
US5030800A
Cited
US5262594A
Cited
US5270493A
Cited
US5165055A
Cited
US5278720A
Cited
US5247735A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-01-07 | 2000-07-08 | 2001-01-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-01-07 | 2004-07-08 | 2005-01-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-01-07 | 2008-07-08 | 2009-01-07 | $7700.00 | Window Closed / Lapsed |