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US5589419A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for fabricating semiconductor device having a multilevel interconnection

Assignee: Sony Corp
•
Filing: 1995-07-21
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Granted: 1996-12-31
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Expires: 2015-07-21
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Abstract

Abstract A process for fabricating a semiconductor device comprising multilevel interconnection, comprising: forming a trench on the surface of a first substrate to provide an element isolating region; forming a first insulating film on the surface of the trench and the first substrate; forming a first interconnection layer on the surface of the first insulating film; forming a second insulating film on the surface of the first substrate in such a manner that the first interconnection layer is covered and the trench is filled; forming a second interconnection layer on the second insulating film; forming sequentially in this order, a third insulating film and an adhesion layer-on the surface of said second insulating film covering the second interconnection layer; bonding a second substrate on the surface of the adhesion layer; planarizing the back of the first substrate by removing the first substrate from the back side thereof and the bottom of the trench; and forming a fourth insulating film on the back of the first substrate, and forming a third interconnection layer on the fourth insulating film. The process according to the present invention enables a semiconductor device comprising a multilevel interconnection with small step height.

Inventors

  • 👤 Akihiko Ochiai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 22:39
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0149; H10W; H10W20/00; H10W20/40; H10W20/01; H10W20/021; H10W20/023; H10D84/0135; H10W20/481; Y; Y10; Y10S; Y10S148/00; Y10S148/012; Y10S148/135; Y10S438/00; Y10S438/928

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 178 words
A process for fabricating a semiconductor device having a multilevel interconnection, comprising: forming a trench on the surface of a first substrate to provide an element isolating region; forming a first insulating film on the surface of the trench and the first substrate; forming a first interconnection layer on the surface of the first insulating film; forming a second insulating film on the surface of the first substrate in such a manner that the first interconnection layer is covered and the trench is filled; forming a second interconnection layer on the second insulating film; forming sequentially in this order, a third insulating film and an adhesion layer on the surface of said second insulating film covering the second interconnection layer; bonding a second substrate on the surface of the adhesion layer; planarizing the back of the first substrate by removing the first substrate from the back side thereof and the bottom of the trench; and forming a fourth insulating film on the back of the first substrate, and forming a third interconnection layer on the fourth insulating film.
Claim 2
Dependent Claim 178 words
A process for fabricating a semiconductor device having a multilevel interconnection, comprising: forming a trench on the surface of a first substrate to provide an element isolating region; forming a first insulating film on the surface of the trench and the first substrate; forming a first interconnection layer on the surface of the first insulating film; forming a second insulating film on the surface of the first substrate in such a manner that the first interconnection layer is covered and the trench is filled; forming a second interconnection layer on the second insulating film; forming sequentially in this order, a third insulating film and an adhesion layer on the surface of said second insulating film covering the second interconnection layer; bonding a second substrate on the surface of the adhesion layer; planarizing the back of the first substrate by removing the first substrate from the back side thereof and the bottom of the trench; and forming a fourth insulating film on the back of the first substrate, and forming a third interconnection layer on the fourth insulating film.
Claim 3
Dependent Claim 46 words
A process for fabricating a semiconductor device as claimed in claim 1, wherein the step of forming a first insulating film comprises forming a gate insulating film, and the step of forming a first interconnection layer comprises forming a gate electrode by patterning a conductive film.
Claim 4
Dependent Claim 30 words
A process for fabricating a semiconductor device as claimed in claim 2, wherein the process further comprises forming a source/drain region on the first substrate after forming the gate electrode.
Claim 5
Dependent Claim 43 words
A process for fabricating a semiconductor device as claimed in claim 1, wherein the step of forming a second insulating film further comprises forming a second insulating film on the entire surface of the first substrate and patterning the resulting second insulating film.
Claim 6
Dependent Claim 43 words
A process for fabricating a semiconductor device as claimed in claim 1, wherein the process for forming the adhesion layer comprises planarizing the surface by forming a polysilicon layer on the third insulating film and polishing the surface of the resulting polysilicon layer.
Claim 7
Dependent Claim 41 words
A process for fabricating a semiconductor device as claimed in claim 1, wherein the step of forming a fourth insulating film comprises forming a fourth insulating film over the back of the first substrate and patterning the resulting fourth insulating film.

References Cited (Backward Citations)

JPS6450543A Cited
US5168078A Cited
US5091330A Cited
US5437762A Cited
US5496764A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-31 2000-07-01 2000-12-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-12-31 2004-07-01 2004-12-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-12-31 2008-07-01 2008-12-31 $7700.00 Window Closed / Lapsed

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