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US5583819A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus and method of use of radiofrequency identification tags

Assignee: Single Chip Holdings Inc
•
Filing: 1995-01-27
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Granted: 1996-12-10
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Expires: 2015-01-27
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Abstract

Abstract A method of programming or writing to an RFID tag with a transient pulse at both high and low frequencies, i.e. in the GHz and KHz ranges is described. Programming an RFID tag using transient pulses rather than a long duration regulated signal allows for less control circuitry, less programming time, less energy, less cost and power requirements for the RFID tag.

Inventors

  • 👤 Bruce B. Roesner
  • 👤 Ronald M. Ames

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 00:04
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; G06; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K19/0723; G11C17/18

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 68 words
A method of programming a radiofrequency identification device comprising: providing an antifuse in a memory cell coupled to a bit line in said radiofrequency identification device; charging a stray capacitance on said bit line; and selectively discharging said antifuse to draw a high peak current through said antifuse from said charged stray capacitance to program said antifuse, whereby said antifuse is programmed at high speed and low power.
Claim 2
Independent Claim 68 words
A method of programming a radiofrequency identification device comprising: providing an antifuse in a memory cell coupled to a bit line in said radiofrequency identification device; charging a stray capacitance on said bit line; and selectively discharging said antifuse to draw a high peak current through said antifuse from said charged stray capacitance to program said antifuse, whereby said antifuse is programmed at high speed and low power.
Claim 3
Dependent Claim 22 words
The method of claim 1 where charging said stray capacitance comprises charging said capacitance to a voltage exceeding the antifuse programming voltage.
Claim 4
Dependent Claim 25 words
The method of claim 1 where charging said stray capacitance on said bit line charges said capacitance with approximately 60 microwatts of power or less.
Claim 5
Dependent Claim 25 words
The method of claim 1 where charging said stray capacitance on said bit line charges said capacitance with approximately less than 100 microwatts of power.
Claim 6
Dependent Claim 72 words
The method of claim 1 where selectively discharging said antifuse couples said antifuse through a gated transistor to ground, said gated transistor having a maximum saturation current capacity, said antifuse having a programming time defined for a predetermined time duration, said stray capacitance on said bit line being charged to a power level such that said saturation current is achieved through said antifuse and transistor during said programming time of said antifuse.
Claim 7
Independent Claim 85 words
A method of programming an antifuse having a minimum programming time at high speed and low power comprising: charging a bit line coupled to said antifuse to a predetermined voltage and thus stored predetermined power level, said bit line having a chargeable capacitance; and discharging said bit line through said antifuse at high speed substantially equal to said minimum programming time required by said antifuse to generate a voltage and current spike through said antifuse sufficient to program said antifuse while utilizing low average power.
Claim 8
Independent Claim 85 words
A method of programming an antifuse having a minimum programming time at high speed and low power comprising: charging a bit line coupled to said antifuse to a predetermined voltage and thus stored predetermined power level, said bit line having a chargeable capacitance; and discharging said bit line through said antifuse at high speed substantially equal to said minimum programming time required by said antifuse to generate a voltage and current spike through said antifuse sufficient to program said antifuse while utilizing low average power.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-10 2000-06-10 2000-12-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-12-10 2004-06-10 2004-12-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-12-10 2008-06-10 2008-12-10 $7700.00 Window Closed / Lapsed

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