Patent US5580815A successfully refreshed from Google Patents.
US5580815A
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Process for forming field isolation and a structure over a semiconductor substrate
Assignee: NXP USA Inc
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Filing: 1994-02-22
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Granted: 1996-12-03
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Expires: 2014-02-22
Abstract
Abstract An annealed amorphous silicon layer is formed prior to forming field isolation regions when using in a LOCOS field isolation process. The annealed amorphous silicon layer helps to reduce encroachment compared to conventional LOCOS field isolation process and helps to reduce the likelihood of forming pits within a substrate compared to a PBL field isolation process. The annealed amorphous silicon layer may be used in forming field isolation regions that defines the active regions between transistors including MOSFETs and bipolar transistors. Doped silicon or a silicon-rich silicon nitride layer may be used in place of conventional materials. The anneal of the amorphous silicon layer may be performed after forming a silicon nitride layer if the silicon nitride layer is deposited at a temperature no higher than 600 degrees Celsius.
Inventors
- 👤 Ting C. Hsu
- 👤 Laureen H. Parker
- 👤 David G. Kolar
- 👤 Philip J. Tobin
- 👤 Hsing-Huang Tseng
- 👤 Lisa K. Garling
- 👤 Vida Ilderem
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:54
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
141 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; incorporating a dopant into the amorphous silicon layer by a manner selected from a group consisting of: in-situ doping; furnace doping; and ion implantation; annealing the amorphous silicon layer to form an annealed silicon layer; forming a silicon nitride layer over the pad layer after the step of depositing the amorphous silicon layer; patterning the silicon nitride layer to form a patterned silicon nitride layer including an opening and a silicon nitride member, wherein the step of patterning is performed after the step of incorporating; thermally oxidizing the substrate underlying the opening to form a field isolation region within the opening and adjacent to the annealed silicon layer; and removing the silicon nitride member.
Claim 2
Dependent Claim
141 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; incorporating a dopant into the amorphous silicon layer by a manner selected from a group consisting of: in-situ doping; furnace doping; and ion implantation; annealing the amorphous silicon layer to form an annealed silicon layer; forming a silicon nitride layer over the pad layer after the step of depositing the amorphous silicon layer; patterning the silicon nitride layer to form a patterned silicon nitride layer including an opening and a silicon nitride member, wherein the step of patterning is performed after the step of incorporating; thermally oxidizing the substrate underlying the opening to form a field isolation region within the opening and adjacent to the annealed silicon layer; and removing the silicon nitride member.
Claim 3
Dependent Claim
38 words
The process of claim 1, wherein the step of incorporating is performed such that the amorphous silicon layer includes an n-type dopant and has a doping concentration in a range of 1E17 to 1E20 atoms per cubic centimeter.
Claim 4
Dependent Claim
31 words
The process of claim 1, wherein the step of annealing is performed in a furnace at a temperature in a range of about 300-620 degrees Celsius for at least twenty minutes.
Claim 5
Dependent Claim
33 words
The process of claim 1, wherein the step of annealing is performed in a rapid thermal processor at a temperature in a range of about 300-800 degrees Celsius for at least five seconds.
Claim 6
Dependent Claim
60 words
The process of claim 1, wherein the step of annealing includes a plurality of portions, wherein: one of the portions is performed in a furnace at a temperature in a range of about 300-620 degrees Celsius; and another one of the portions is performed in a rapid thermal processor at a temperature in a range of about 300-800 degrees Celsius.
Claim 7
Dependent Claim
45 words
The process of claim 1, further comprising a step of forming a first bipolar transistor and a second bipolar transistor after the step of removing the silicon nitride member, wherein the field isolation region lies adjacent to and between the first and second bipolar transistors.
Claim 8
Dependent Claim
122 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer; forming a silicon nitride layer over the amorphous silicon layer; patterning the silicon nitride layer to form a patterned silicon nitride layer including a silicon nitride layer opening and a silicon nitride member; thermally oxidizing the substrate underlying the silicon nitride layer opening to form a field isolation region within the silicon nitride layer opening; and removing the silicon nitride member, wherein the annealing step is performed in a separate step from the step of forming the silicon nitride layer and prior to the step of thermally oxidizing the substrate.
Claim 9
Dependent Claim
122 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer; forming a silicon nitride layer over the amorphous silicon layer; patterning the silicon nitride layer to form a patterned silicon nitride layer including a silicon nitride layer opening and a silicon nitride member; thermally oxidizing the substrate underlying the silicon nitride layer opening to form a field isolation region within the silicon nitride layer opening; and removing the silicon nitride member, wherein the annealing step is performed in a separate step from the step of forming the silicon nitride layer and prior to the step of thermally oxidizing the substrate.
Claim 10
Dependent Claim
61 words
The process of claim 7, wherein: the amorphous silicon layer is deposited to a thickness in a range of about 200-700 angstroms; the silicon nitride layer is formed to a thickness in a range of about 1000-2500 angstroms; and the pad layer is formed to a thickness no greater than about 40 percent of the thickness of the silicon nitride layer.
Claim 11
Dependent Claim
32 words
The process of claim 7, wherein the step of annealing that is performed in a furnace at a temperature in a range of about 300-620 degrees Celsius for at least twenty minutes.
Claim 12
Dependent Claim
34 words
The process of claim 7, wherein the step of annealing that is performed in a rapid thermal processor at a temperature in a range of about 300-800 degrees Celsius for at least five seconds.
Claim 13
Dependent Claim
21 words
The process of claim 7, wherein the step of annealing is performed at a temperature no higher than 620 degrees Celsius.
Claim 14
Dependent Claim
54 words
The process of claim 11, wherein: the step of annealing is performed after the step of forming the silicon nitride layer; and the steps of annealing and thermally oxidizing are performed during the same thermal cycle, wherein the annealing step is performed in a separate step from the step of thermally oxidizing the substrate.
Claim 15
Dependent Claim
27 words
The process of claim 11, wherein the steps of forming a silicon nitride layer and annealing the amorphous silicon layer are performed during the same thermal cycle.
Claim 16
Dependent Claim
81 words
The process of claim 7, wherein the step of annealing the amorphous silicon layer, wherein: the step of annealing is performed prior to the step of thermally oxidizing; the step of annealing includes a first portion and a second portion; the first portion is performed in a furnace at a temperature in a range of about 300-620 degrees Celsius; and the second portion is performed in a rapid thermal processor at a temperature in a range of about 300-800 degrees Celsius.
Claim 17
Dependent Claim
25 words
The process of claim 7, wherein the step of forming the silicon nitride layer is performed at a temperature no greater than 600 degrees Celsius.
Claim 18
Dependent Claim
28 words
The process of claim 7, further comprising a step of removing any remaining portion of the amorphous silicon layer after the step of removing the silicon nitride member.
Claim 19
Dependent Claim
45 words
The process of claim 7, further comprising a step of forming a first bipolar transistor and a second bipolar transistor after the step of removing the silicon nitride member, wherein the field isolation region lies adjacent to and between the first and second bipolar transistors.
Claim 20
Dependent Claim
105 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer to form an annealed silicon layer; forming a silicon nitride layer over the annealed silicon layer before performing a thermal oxidation step; patterning the silicon nitride layer to form a patterned silicon nitride layer including a silicon nitride layer opening and a silicon nitride member; thermally oxidizing the substrate underlying the silicon nitride layer opening to form a field isolation region within the silicon nitride layer opening; and removing the silicon nitride member.
Claim 21
Dependent Claim
105 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer to form an annealed silicon layer; forming a silicon nitride layer over the annealed silicon layer before performing a thermal oxidation step; patterning the silicon nitride layer to form a patterned silicon nitride layer including a silicon nitride layer opening and a silicon nitride member; thermally oxidizing the substrate underlying the silicon nitride layer opening to form a field isolation region within the silicon nitride layer opening; and removing the silicon nitride member.
Claim 22
Dependent Claim
61 words
The process of claim 18, wherein: the amorphous silicon layer is deposited to a thickness in a range of about 200-700 angstroms; the silicon nitride layer is formed to a thickness in a range of about 1000-2500 angstroms; and the pad layer is formed to a thickness no greater than about 40 percent of the thickness of the silicon nitride layer.
Claim 23
Dependent Claim
29 words
The process of claim 18, wherein the step of annealing is performed in a furnace at a temperature in a range of about 300-620 for at least twenty minutes.
Claim 24
Dependent Claim
31 words
The process of claim 18, wherein the step of annealing is performed in a rapid thermal processor at a temperature in a range of about 300-800 for at least five seconds.
Claim 25
Dependent Claim
31 words
The process of claim 18, wherein the step of annealing is performed in a rapid thermal process at a temperature in a range of about 300-620 for at least thirty seconds.
Claim 26
Dependent Claim
23 words
The process of claim 18, wherein the steps of forming and annealing the amorphous silicon layer are performed during the same thermal cycle.
Claim 27
Dependent Claim
27 words
The process of claim 18, wherein the steps of annealing the amorphous silicon layer and forming the silicon nitride layer are performed during the same thermal cycle.
Claim 28
Dependent Claim
33 words
The process of claim 18, wherein the step of annealing is performed during a thermal cycle separate from both the steps of depositing the amorphous silicon layer and forming the silicon nitride layer.
Claim 29
Dependent Claim
60 words
The process of claim 18, wherein the step of annealing includes a first portion and a second portion, wherein: the first portion is performed in a furnace at a temperature in a range of about 300-620 degrees Celsius; and the second portion is performed in a rapid thermal processor at a temperature in a range of about 300-800 degrees Celsius.
Claim 30
Dependent Claim
106 words
The process of claim 18, wherein the step of annealing is performed using an ambient selected from a group consisting of: an inert gas; an inert gas and an oxidizing species, wherein the ambient includes no more than about five volume percent of the oxidizing species; an inert gas and a chlorinating species, wherein the ambient includes no more than about ten volume percent of the chlorinating species; and an inert gas, an oxidizing species, and a chlorinating species, wherein the ambient includes no more than about five volume percent of the oxidizing species and no more than about ten volume percent of the chlorinating species.
Claim 31
Dependent Claim
28 words
The process of claim 18, further comprising a step of removing any remaining portion of the annealed silicon layer after the step of removing the silicon nitride member.
Claim 32
Dependent Claim
45 words
The process of claim 18, further comprising a step of forming a first bipolar transistor and a second bipolar transistor after the step of removing the silicon nitride member, wherein the field isolation region lies adjacent to and between the first and second bipolar transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-12-03 | 2000-06-03 | 2000-12-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-12-03 | 2004-06-03 | 2004-12-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-12-03 | 2008-06-03 | 2008-12-03 | $7700.00 | Window Closed / Lapsed |