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US5579522A Expired / Lapsed US ⏱️ 0.0 years remaining

Dynamic non-volatile memory update in a computer system

Assignee: Intel Corp
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Filing: 1995-07-24
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Granted: 1996-11-26
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Expires: 2015-07-24
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Abstract

Abstract A computer system wherein a portion of code/data stored in a non-volatile memory device can be dynamically modified or updated without removing any covers or parts from the computer system. The computer system of the preferred embodiment includes a flash memory component coupled to a computer system bus for storing non-volatile code and data. Using the present invention, the contents of a portion of the flash memory may be replaced, modified, updated, or reprogrammed without the need for removing and/or replacing any computer system hardware components. The flash memory device used in the preferred embodiment contains four separately erasable/programmable non-symmetrical blocks of memory. One of these four blocks may be electronically locked to prevent erasure or modification of its contents once it is installed. This configuration allows the processing logic of the computer system to update or modify any selected block of memory without affecting the contents of other blocks. One memory block contains a normal BIOS. An electronically protected flash memory area is used for storage of a recovery BIOS which is used for recovery operations. The present invention also includes hardware for selecting one of the two available update modes: normal or recovery. Thus, using a mode selection apparatus, either a normal system BIOS or a recovery BIOS may be activated.

Inventors

  • 👤 Orville H. Christeson
  • 👤 Douglas L. Gabel
  • 👤 Sean T. Murphy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 15:03
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/14; G06F11/1402; G06F11/1415; G06F11/1433; G06F8/00; G06F8/60; G06F8/65; G06F8/656

Claims Analysis

Total Claims: 31
Claim 1
Independent Claim 155 words
A computer system comprising: a processor for executing processing logic; a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having BIOS firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable; a random access memory (RAM) device coupled to said processor; means for transferring a first portion of said BIOS firmware from said programmable non-volatile semiconductor memory device to said RAM, said first portion being specifically directed to updating other portions of said programmable non-volatile semiconductor memory device, said means for transferring coupled to said processor; means for erasing a portion of said programmable non-volatile semiconductor memory device, said means for erasing coupled to said processor; and, means for updating a second portion of said BIOS firmware in said programmable non-volatile semiconductor memory while said first portion of said BIOS firmware is executing from said RAM, said means for updating coupled to said processor.
Claim 2
Dependent Claim 155 words
A computer system comprising: a processor for executing processing logic; a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having BIOS firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable; a random access memory (RAM) device coupled to said processor; means for transferring a first portion of said BIOS firmware from said programmable non-volatile semiconductor memory device to said RAM, said first portion being specifically directed to updating other portions of said programmable non-volatile semiconductor memory device, said means for transferring coupled to said processor; means for erasing a portion of said programmable non-volatile semiconductor memory device, said means for erasing coupled to said processor; and, means for updating a second portion of said BIOS firmware in said programmable non-volatile semiconductor memory while said first portion of said BIOS firmware is executing from said RAM, said means for updating coupled to said processor.
Claim 3
Dependent Claim 21 words
The computer system as claimed in claim 1 wherein said programmable non-volatile semiconductor memory device is a flash semiconductor memory device.
Claim 4
Dependent Claim 46 words
The computer system as claimed in claim 1 wherein said programmable non-volatile semiconductor memory device is partitioned into at least two separately erasable and programmable partitions, a first partition storing recovery processing logic and data, a second partition storing normal operating system processing logic and data.
Claim 5
Dependent Claim 17 words
The computer system as claimed in claim 1 wherein said firmware is a basic input/output system (BIOS).
Claim 6
Dependent Claim 42 words
The computer system as claimed in claim 1 said means for updating further including: means for selecting an update type, said update type being either a normal update type or a recovery update type, said means for selecting coupled to said processor.
Claim 7
Dependent Claim 89 words
The computer system as claimed in claim 3, wherein said means for updating further including: means for selecting an update type, said update type being either a normal update type or a recovery update type, said means for selecting coupled to said processor; normal update processing logic operably disposed in said random access memory; means for activating said normal update processing logic if said normal update type is selected by said means for selecting; and means for reprogramming said second partition if said normal update processing logic is activated.
Claim 8
Dependent Claim 65 words
The computer system as claimed in claim 6 said means for reprogramming further including: protected update processing logic residing within said normal operating system processing logic stored in said second partition; means for transferring said protected update processing logic to said random access memory; and means for activating said protected update processing logic, said protected update processing logic controlling the programming of said second partition.
Claim 9
Dependent Claim 78 words
The computer system as claimed in claim 3 said means for updating further including: means for selecting an update type, said update type being either a normal update type or a recovery update type, said means for selecting coupled to said processor; means for activating said recovery processing logic if said recovery update type is selected by said means for selecting an update type; and means for reprogramming said second partition if said recovery processing logic is activated.
Claim 10
Dependent Claim 19 words
The computer system as claimed in claim 3 wherein said first partition is electronically protected from erasure or modification.
Claim 11
Dependent Claim 158 words
A computer system comprising: a processor for executing processing logic; a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having BIOS firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable; a random access memory (RAM) device coupled to said processor; means for transferring a first portion of said BIOS firmware from said programmable non-volatile semiconductor memory device to said RAM, said first portion being specifically directed to updating other portions of said programmable non-volatile semiconductor memory device, said means for transferring coupled to said processor; means for erasing a portion of said programmable non-volatile semiconductor memory device, said means for erasing coupled to said processor; and, means for updating application specific BIOS firmware residing in a second portion of said programmable non-volatile semiconductor memory device while said first portion of said BIOS firmware is executing from said RAM, said means for updating coupled to said processor.
Claim 12
Dependent Claim 158 words
A computer system comprising: a processor for executing processing logic; a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having BIOS firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable; a random access memory (RAM) device coupled to said processor; means for transferring a first portion of said BIOS firmware from said programmable non-volatile semiconductor memory device to said RAM, said first portion being specifically directed to updating other portions of said programmable non-volatile semiconductor memory device, said means for transferring coupled to said processor; means for erasing a portion of said programmable non-volatile semiconductor memory device, said means for erasing coupled to said processor; and, means for updating application specific BIOS firmware residing in a second portion of said programmable non-volatile semiconductor memory device while said first portion of said BIOS firmware is executing from said RAM, said means for updating coupled to said processor.
Claim 13
Dependent Claim 29 words
The computer system as claimed in claim 10 further including means for enabling scanning of said second portion of said programmable non-volatile semiconductor memory device containing application specific firmware.
Claim 14
Dependent Claim 17 words
The computer system as claimed in claim 10 wherein said application specific firmware includes LAN processing logic.
Claim 15
Dependent Claim 17 words
The computer system as claimed in claim 10 wherein said application specific firmware includes SCSI processing logic.
Claim 16
Dependent Claim 161 words
In a computer system having a processor for executing processing logic, a random access memory (RAM) coupled to said processor and a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable, said firmware including a first portion programmed into an electronically write protected area of said programmable non-volatile semiconductor memory device, said first portion being specifically directed to updating said programmable non-volatile semiconductor memory device, a process for updating portions of said programmable non-volatile semiconductor memory device while said firmware is executing from said RAM, said process comprising the steps of: transferring said first portion from said electronically protected area of said programmable non-volatile semiconductor memory device to said RAM; executing said first portion to update a second portion of said programmable non-volatile semiconductor memory device; and updating said second portion while said first portion is executing from said RAM.
Claim 17
Dependent Claim 161 words
In a computer system having a processor for executing processing logic, a random access memory (RAM) coupled to said processor and a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable, said firmware including a first portion programmed into an electronically write protected area of said programmable non-volatile semiconductor memory device, said first portion being specifically directed to updating said programmable non-volatile semiconductor memory device, a process for updating portions of said programmable non-volatile semiconductor memory device while said firmware is executing from said RAM, said process comprising the steps of: transferring said first portion from said electronically protected area of said programmable non-volatile semiconductor memory device to said RAM; executing said first portion to update a second portion of said programmable non-volatile semiconductor memory device; and updating said second portion while said first portion is executing from said RAM.
Claim 18
Dependent Claim 107 words
The process as claimed in claim 14, said process further including the steps of: selecting whether said first portion or said second portion is initially executed; transferring said second portion from an unprotected area of said programmable non-volatile semiconductor memory device to said RAM, said step of transferring said second portion being performed if said second portion is selected for initial execution in said selecting step; executing said second portion from said RAM if said second portion is selected for initial execution in said selecting step; and executing said first portion from said RAM if said first portion is selected for initial execution in said selecting step.
Claim 19
Dependent Claim 24 words
The process of claim 15, wherein said second portion of said programmable non-volatile semiconductor memory device includes a second version of operating system firmware.
Claim 20
Dependent Claim 21 words
The process of claim 15, wherein said second portion of said programmable non-volatile semiconductor memory device includes application specific processing logic.
Claim 21
Dependent Claim 146 words
In a computer system having a processor for executing processing logic, a random access memory (RAM) coupled to said processor and a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having operating system firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable, a process for updating application specific firmware residing in a portion of said programmable non-volatile semiconductor memory device while said operating system firmware is executing, said process comprising the steps of: transferring a first portion of said operating system firmware from said programmable non-volatile semiconductor memory device to said RAM, said first portion being specifically directed to reprogramming portions of said programmable non-volatile semiconductor memory device; and executing said first portion of said operating system firmware to reprogram a second portion of said programmable non-volatile semiconductor memory device with application specific firmware.
Claim 22
Dependent Claim 146 words
In a computer system having a processor for executing processing logic, a random access memory (RAM) coupled to said processor and a programmable non-volatile semiconductor memory device coupled to said processor, said programmable non-volatile semiconductor memory device having operating system firmware programmed therein, portions of said programmable non-volatile semiconductor memory device being write modifiable, a process for updating application specific firmware residing in a portion of said programmable non-volatile semiconductor memory device while said operating system firmware is executing, said process comprising the steps of: transferring a first portion of said operating system firmware from said programmable non-volatile semiconductor memory device to said RAM, said first portion being specifically directed to reprogramming portions of said programmable non-volatile semiconductor memory device; and executing said first portion of said operating system firmware to reprogram a second portion of said programmable non-volatile semiconductor memory device with application specific firmware.
Claim 23
Dependent Claim 29 words
The process as claimed in claim 18 further including a step of enabling scanning of said second portion of said programmable non-volatile semiconductor memory device containing application specific firmware.
Claim 24
Dependent Claim 16 words
The process as claimed in claim 18 wherein said application specific firmware includes LAN processing logic.
Claim 25
Dependent Claim 16 words
The process as claimed in claim 18 wherein said application specific firmware includes SCSI processing logic.
Claim 26
Dependent Claim 114 words
A computer system comprising: a processor for executing logic instructions; a programmable flash memory electrically connected to said processor, said programmable flash memory subdivided into a first part and a second part; said first part of said programmable flash memory stores BIOS instructions for a normal update mode, wherein said normal update mode includes the instructions needed to save, verify, or update areas of flash memory including said second part of said programmable flash memory; said second part of said programmable flash memory stores BIOS instructions for a recovery update mode, wherein said recovery update mode includes instructions needed to start the computer system and update the first part of said programmable flash memory.
Claim 27
Dependent Claim 114 words
A computer system comprising: a processor for executing logic instructions; a programmable flash memory electrically connected to said processor, said programmable flash memory subdivided into a first part and a second part; said first part of said programmable flash memory stores BIOS instructions for a normal update mode, wherein said normal update mode includes the instructions needed to save, verify, or update areas of flash memory including said second part of said programmable flash memory; said second part of said programmable flash memory stores BIOS instructions for a recovery update mode, wherein said recovery update mode includes instructions needed to start the computer system and update the first part of said programmable flash memory.
Claim 28
Dependent Claim 27 words
The computer system described in claim 22, wherein said computer system includes a hardware device for selecting either said normal update mode or said recovery update mode.
Claim 29
Dependent Claim 14 words
The computer system of claim 23 wherein said hardware device is a jumper cable.
Claim 30
Independent Claim 113 words
A method of updating a BIOS stored in a programmable non-volatile semiconductor memory device in a computer, said method comprising the steps of: creating two portions of BIOS, a normal update portion and a recovery update portion and storing each portion in a section of said programmable non-volatile semiconductor memory device; using a hardware device to switch between two start-up modes in said computer; choosing to load into RAM memory either said normal update portion of BIOS or said recovery update portion of BIOS depending on setting of said hardware device; loading the chosen portion of BIOS into said RAM memory; and updating the portion of BIOS not loaded into said RAM memory.
Claim 31
Independent Claim 113 words
A method of updating a BIOS stored in a programmable non-volatile semiconductor memory device in a computer, said method comprising the steps of: creating two portions of BIOS, a normal update portion and a recovery update portion and storing each portion in a section of said programmable non-volatile semiconductor memory device; using a hardware device to switch between two start-up modes in said computer; choosing to load into RAM memory either said normal update portion of BIOS or said recovery update portion of BIOS depending on setting of said hardware device; loading the chosen portion of BIOS into said RAM memory; and updating the portion of BIOS not loaded into said RAM memory.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-11-26 2000-05-27 2000-11-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-11-26 2004-05-27 2004-11-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-11-26 2008-05-27 2008-11-26 $7700.00 Window Closed / Lapsed

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