Patent US5576661A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5576661A Expired / Lapsed US ⏱️ 0.0 years remaining

Frequency characteristic of semiconductor device in ultra-high frequency band

Assignee: Renesas Electronics Corp
•
Filing: 1995-04-25
•
Granted: 1996-11-19
•
Expires: 2015-04-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An ultra-high frequency semiconductor device according to another aspect of the present invention, includes Field Effect transistor (FET) chips each of which includes FET elements and which are connected to each other by bonding wires, and an internal matching circuit having a concentrated parameter circuit and a distributed parameter circuit, and wherein the concentrated parameter circuit includes capacitor chips provided on input and output sides of the FET chips and including a plurality of chip capacitors each of which is connected to said corresponding FET elements, and wherein each of the chip capacitors has a length predetermined based on a frequency band used in practice. Each of said chip capacitors may have a length predetermined such that a resonance frequency does not exist in a frequency band used in practice or a length predetermined such that an input impedance of each of said chip capacitors is capacitive at an upper limit frequency of the frequency band.

Inventors

  • 👤 Akira Kumagai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 09:33
CPC Classifications
H; H01; H01P; H01P5/00; H01P5/02; H01P5/022; H01P5/028; H03; H03H; H03H7/00; H03H7/38; H03H7/383; H10; H10W; H10W72/00; H10W72/50; H10W72/541; H10W72/5445; H10W72/90; H10W72/931; H10W72/932

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 137 words
An ultra-high frequency semiconductor device comprising: Field Effect transistor (FET) chips, each including FET elements, said FET chips being connected to each other by bonding wires; capacitor chips provided on input and output sides of said FET chips and including a plurality of chip capacitors each of which being connected to corresponding ones of said FET elements; and dielectric substance substrates, each of which has open stub patterns and a microstrip transmission line formed thereon, each said microstrip transmission line being connected to said corresponding chip capacitors by bonding wires; wherein each of said chip capacitors has a length predetermined based on a frequency band used in practice; wherein each of said microstrip transmission lines has branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 2
Dependent Claim 137 words
An ultra-high frequency semiconductor device comprising: Field Effect transistor (FET) chips, each including FET elements, said FET chips being connected to each other by bonding wires; capacitor chips provided on input and output sides of said FET chips and including a plurality of chip capacitors each of which being connected to corresponding ones of said FET elements; and dielectric substance substrates, each of which has open stub patterns and a microstrip transmission line formed thereon, each said microstrip transmission line being connected to said corresponding chip capacitors by bonding wires; wherein each of said chip capacitors has a length predetermined based on a frequency band used in practice; wherein each of said microstrip transmission lines has branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 3
Dependent Claim 29 words
The ultra-high frequency semiconductor device according to claim 1, further comprising bonding wires for connecting, on said input and output sides, adjacent ones of said plurality of chip capacitors.
Claim 4
Dependent Claim 36 words
The ultra-high frequency semiconductor device according to claim 1, wherein said length is predetermined such that an input impedance of each of said chip capacitors is capacitive at an upper limit frequency of the frequency band.
Claim 5
Dependent Claim 125 words
An ultra-high frequency semiconductor device comprising: Field Effect transistor (FET) chips, each including FET elements, said FET chips being connected to each other by bonding wires, and an internal matching circuit having a concentrated parameter circuit and a distributed parameter circuit; wherein said concentrated parameter circuit includes capacitor chips provided on input and output sides of said FET chips and including a plurality of chip capacitors each of which is connected to said corresponding FET elements; wherein each of said chip capacitors has a length predetermined based on a frequency band used in practice; wherein said distributed parameter circuit includes a microstrip line having branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 6
Dependent Claim 125 words
An ultra-high frequency semiconductor device comprising: Field Effect transistor (FET) chips, each including FET elements, said FET chips being connected to each other by bonding wires, and an internal matching circuit having a concentrated parameter circuit and a distributed parameter circuit; wherein said concentrated parameter circuit includes capacitor chips provided on input and output sides of said FET chips and including a plurality of chip capacitors each of which is connected to said corresponding FET elements; wherein each of said chip capacitors has a length predetermined based on a frequency band used in practice; wherein said distributed parameter circuit includes a microstrip line having branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 7
Dependent Claim 29 words
The ultra-high frequency semiconductor device according to claim 4, further comprising bonding wires for connecting, on said input and output sides, adjacent ones of said plurality of chip capacitors.
Claim 8
Dependent Claim 36 words
The ultra-high frequency semiconductor device according to claim 4, wherein said length is predetermined such that an input impedance of each of said chip capacitors is capacitive at an upper limit frequency of the frequency band.
Claim 9
Dependent Claim 188 words
An ultra-high frequency semiconductor device comprising: FET chips each of which includes GaAs MES FET elements and which are connected to each other by bonding wires, capacitor chips provided on input and output sides of said FET chips, wherein each of said capacitor chips includes a dielectric substance, a lower surface metalized pattern formed on a whole lower surface of said dielectric substance and upper surface metalized patterns, wherein said lower surface metalized pattern, said dielectric substance, and each of said upper surface metalized patterns constitute one chip capacitor, and wherein said each upper surface metalized pattern is connected to said corresponding GaAs MES FET elements, and dielectric substance substrates, each of which has open stub patterns and a microstrip transmission line formed thereon, and each said microstrip transmission line being connected to said corresponding chip capacitors by bonding wires; wherein a length of said upper surface metalized pattern is predetermined based on a frequency band used in practice; wherein each of said microstrip transmission lines has branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 10
Dependent Claim 188 words
An ultra-high frequency semiconductor device comprising: FET chips each of which includes GaAs MES FET elements and which are connected to each other by bonding wires, capacitor chips provided on input and output sides of said FET chips, wherein each of said capacitor chips includes a dielectric substance, a lower surface metalized pattern formed on a whole lower surface of said dielectric substance and upper surface metalized patterns, wherein said lower surface metalized pattern, said dielectric substance, and each of said upper surface metalized patterns constitute one chip capacitor, and wherein said each upper surface metalized pattern is connected to said corresponding GaAs MES FET elements, and dielectric substance substrates, each of which has open stub patterns and a microstrip transmission line formed thereon, and each said microstrip transmission line being connected to said corresponding chip capacitors by bonding wires; wherein a length of said upper surface metalized pattern is predetermined based on a frequency band used in practice; wherein each of said microstrip transmission lines has branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 11
Dependent Claim 26 words
The ultra-high frequency semiconductor device according to claim 7, further comprising bonding wires connecting adjacent ones of said upper surface metalized patterns of said chip capacitors.
Claim 12
Dependent Claim 36 words
The ultra-high frequency semiconductor device according to claim 7, wherein said length is predetermined such that an input impedance of each of said chip capacitors is capacitive at an upper limit frequency of the frequency band.
Claim 13
Dependent Claim 133 words
An ultra-high frequency semiconductor device, comprising: Field Effect transistor (FET) chips each of which includes FET elements and which are connected to each other by bonding wires, and an internal matching circuit having a concentrated parameter circuit and a distributed parameter circuit; wherein said concentrated parameter circuit includes capacitor chips provided on input and output sides of said FET chips and includes a plurality of chip capacitors each of which is connected to said corresponding FET elements; wherein each of said chip capacitors has a length predetermined such that a resonance frequency does not exist in a frequency band used in practice; wherein said distributed parameter circuit includes a microstrip line having branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 14
Dependent Claim 133 words
An ultra-high frequency semiconductor device, comprising: Field Effect transistor (FET) chips each of which includes FET elements and which are connected to each other by bonding wires, and an internal matching circuit having a concentrated parameter circuit and a distributed parameter circuit; wherein said concentrated parameter circuit includes capacitor chips provided on input and output sides of said FET chips and includes a plurality of chip capacitors each of which is connected to said corresponding FET elements; wherein each of said chip capacitors has a length predetermined such that a resonance frequency does not exist in a frequency band used in practice; wherein said distributed parameter circuit includes a microstrip line having branch ports provided with a gap; and wherein said semiconductor device further comprises a bonding wire connected between the branch ports.
Claim 15
Dependent Claim 26 words
The ultra-high frequency semiconductor device according to claim 10, further comprising bonding wires connecting, on said input and output sides, adjacent ones of said chip capacitors.
Claim 16
Dependent Claim 36 words
The ultra-high frequency semiconductor device according to claim 10, wherein said length is predetermined such that an input impedance of each of said chip capacitors is capacitive at an upper limit frequency of the frequency band.
Claim 17
Dependent Claim 41 words
The ultra-high frequency semiconductor device according to claim 10, wherein said length is shorter than 0.25 λ g and longer than 0.15 λ g , where λ g is a wave length corresponding to a center frequency of the frequency band.

References Cited (Backward Citations)

US4353047A Cited
EP0411919A2 Cited
US5132641A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-11-19 2000-05-20 2000-11-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-11-19 2004-05-20 2004-11-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-11-19 2008-05-20 2008-11-19 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag