Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
60 words
An interconnect sheet for connecting circuit layers in printed wiring boards comprising through holes spaced to a first pitch, the interconnect sheet comprising: a dielectric; and an area grid of solder columns comprised in said dielectric; wherein the solder columns of the grid have a second pitch which is less than the first pitch, thereby making the interconnect sheet anisotropic.
Claim 2
Dependent Claim
60 words
An interconnect sheet for connecting circuit layers in printed wiring boards comprising through holes spaced to a first pitch, the interconnect sheet comprising: a dielectric; and an area grid of solder columns comprised in said dielectric; wherein the solder columns of the grid have a second pitch which is less than the first pitch, thereby making the interconnect sheet anisotropic.
Claim 3
Dependent Claim
18 words
The interconnect sheet of claim 1, wherein said solder columns are approximately equally spaced apart from each other.
Claim 4
Dependent Claim
29 words
The interconnect sheet of claim 2, wherein said area array grid of solder columns comprises a grid of approximately 0.003 inch solder columns having approximately a 0.006 inch pitch.
Claim 5
Dependent Claim
109 words
A printed wiring board comprising: a first printed wiring board subsection having through holes spaced at a first pitch; a second printed wiring board subsection having through holes spaced at a second pitch; and an interconnect sheet comprising a dielectric and an area array grid of solder columns spaced at a third pitch; wherein the third pitch is less than the first pitch and the second pitch; and wherein the interconnect sheet is disposed between the first and second printed wiring board subsections and thereby connects circuit layers in the first and second printed wiring board subsections irrespective of the interconnect sheet's alignment with the printed wiring board subsections.
Claim 6
Dependent Claim
109 words
A printed wiring board comprising: a first printed wiring board subsection having through holes spaced at a first pitch; a second printed wiring board subsection having through holes spaced at a second pitch; and an interconnect sheet comprising a dielectric and an area array grid of solder columns spaced at a third pitch; wherein the third pitch is less than the first pitch and the second pitch; and wherein the interconnect sheet is disposed between the first and second printed wiring board subsections and thereby connects circuit layers in the first and second printed wiring board subsections irrespective of the interconnect sheet's alignment with the printed wiring board subsections.
Claim 7
Independent Claim
108 words
A method for creating a printed circuit board comprising the steps of: constructing a first printed circuit board subsection with a first through hole pitch; constructing a second printed circuit board subsection with a second through hole pitch; and placing an interconnect sheet comprising a dielectric and an area array grid of solder columns spaced at a third pitch in between the first and second printed circuit board subsections; wherein the third pitch is less than the first pitch and the second pitch; and wherein the pitch of the solder columns prevents misalignment of the interconnect sheet with respect to the first and second printed circuit board subsections.
Claim 8
Independent Claim
108 words
A method for creating a printed circuit board comprising the steps of: constructing a first printed circuit board subsection with a first through hole pitch; constructing a second printed circuit board subsection with a second through hole pitch; and placing an interconnect sheet comprising a dielectric and an area array grid of solder columns spaced at a third pitch in between the first and second printed circuit board subsections; wherein the third pitch is less than the first pitch and the second pitch; and wherein the pitch of the solder columns prevents misalignment of the interconnect sheet with respect to the first and second printed circuit board subsections.