Method for fabricating polycide gate MOSFET devices

Claim 1

A method for fabricating metal oxide semiconductor field effect transistor device on a semiconductor substrate, comprising the steps of: sequentially forming a gate oxide layer, a polysilicon gate layer, and a refractory metal silicide layer over said semiconductor substrate; forming a barrier cap layer over said refractory metal silicide layer, wherein said refractory metal silicide layer being transformed from its amorphous form into its crystalline form simultaneously; selectively etching said barrier cap layer, said refractory metal silicide layer, said polysilicon gate layer, and said gate oxide layer to form a gate electrode structure; transforming sidewall portions of said refractory metal silicide layer from its crystalline form into its amorphous form by a first ion implantation; forming a first thin thermal oxide layer over the exposed surfaces of said gate electrode structure and said semiconductor substrate; forming lightly doped source/drain regions in said semiconductor substrate by a second ion implantation using said gate electrode structure as a mask; forming a dielectric layer over said first thin thermal oxide layer; anisotropically etching said dielectric layer and said first thin thermal oxide layer to form sidewall spacers on the side walls of said gate electrode structure; forming a second thin thermal oxide layer over the exposed surfaces of said gate electrode structure, and said semiconductor substrate; and forming heavily doped source/drain regions in said semiconductor substrate by a third ion implantation using said gate electrode structure and said sidewall spacers as a mask, completing said metal oxide semiconductor field effect transistor device.

Claim 2

A method for fabricating metal oxide semiconductor field effect transistor device on a semiconductor substrate, comprising the steps of: sequentially forming a gate oxide layer, a polysilicon gate layer, and a refractory metal silicide layer over said semiconductor substrate; forming a barrier cap layer over said refractory metal silicide layer, wherein said refractory metal silicide layer being transformed from its amorphous form into its crystalline form simultaneously; selectively etching said barrier cap layer, said refractory metal silicide layer, said polysilicon gate layer, and said gate oxide layer to form a gate electrode structure; transforming sidewall portions of said refractory metal silicide layer from its crystalline form into its amorphous form by a first ion implantation; forming a first thin thermal oxide layer over the exposed surfaces of said gate electrode structure and said semiconductor substrate; forming lightly doped source/drain regions in said semiconductor substrate by a second ion implantation using said gate electrode structure as a mask; forming a dielectric layer over said first thin thermal oxide layer; anisotropically etching said dielectric layer and said first thin thermal oxide layer to form sidewall spacers on the side walls of said gate electrode structure; forming a second thin thermal oxide layer over the exposed surfaces of said gate electrode structure, and said semiconductor substrate; and forming heavily doped source/drain regions in said semiconductor substrate by a third ion implantation using said gate electrode structure and said sidewall spacers as a mask, completing said metal oxide semiconductor field effect transistor device.