Flash memory having data refresh function and data refresh method of flash memory

Claim 2

A flash memory having data refresh function, permitting verify operation of writing and erasing data to and from a memory cell utilizing program verify mode and erase verify mode, said flash memory comprising: comparing means for comparing data read out in the program verify mode in response to assignment of a read-out address and data read out in the erase verify mode in response to assignment of the same address as the read-out address; and rewrite control means for controlling rewrite of data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by said comparing means.

Claim 3

A flash memory having data refresh function as set forth in claim 1, comprising: control means for assigning a read-out address, and for setting the program verify mode and the erase verify mode in different reading timing; first memory means for storing data read out in the program verify mode in response to assignment of a read-out address by said control means, and for supplying the data to said comparing means; second memory means for storing data read out in the erase verify mode in response to assignment of the same address as the read-out address, and for supplying the stored data to said comparing means; and address incrementing means for incrementing the read-out address, when coincidence is detected by said comparing means or after the rewrite by said rewrite control means.

Claim 4

A flash memory having data refresh function as set forth in claim 2, wherein a plurality of memory cells are provided, and said first memory means stores data comprising one or more bits read out from one or more memory cells in the program verify mode in response to one read-out address, and said second memory means stores data comprising one or more bits read out from one or more memory cells in the erase verify mode in response to said one read-out address, and said rewrite control means controls the rewrite of only data of a memory cell corresponding to inconsistent bits, when the inconsistent bits are detected by said comparing means.

Claim 5

A flash memory having data refresh function as set forth in claim 3, wherein said rewrite control means rewrites data of a memory cell corresponding to the inconsistent bits in information write state.

Claim 6

A flash memory having data refresh function, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said flash memory comprising: comparing means for comparing an adding result of data read out from all memory cells in one block of the plural blocks in the program verify mode and an adding result of data read out from all memory cells in the same block as said one block in the erase verify mode, and for comparing data read out in the program verify mode in response to assignment of a read-out address and data read out in the erase verify mode in response to assignment of the same address as the read-out address, in a block where inconsistency of the adding results is detected; and rewrite control means for controlling the rewrite of data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by said comparing means.

Claim 7

A flash memory having data refresh function, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said flash memory comprising: comparing means for comparing an adding result of data read out from all memory cells in one block of the plural blocks in the program verify mode and an adding result of data read out from all memory cells in the same block as said one block in the erase verify mode, and for comparing data read out in the program verify mode in response to assignment of a read-out address and data read out in the erase verify mode in response to assignment of the same address as the read-out address, in a block where inconsistency of the adding results is detected; and rewrite control means for controlling the rewrite of data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by said comparing means.

Claim 8

A flash memory having data refresh function, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said flash memory comprising: control means for assigning addresses of the plural blocks in sequence and assigning a read-out address in the assigned block, and for setting the program verify mode and the erase verify mode in different reading timing during data refresh operation; first memory means for storing an adding result of data read out from all memory cells in one block corresponding to a block address assigned by said control means in the program verify mode; second memory means for storing an adding result of data read out from all memory cells in said one block in the erase verify mode; and comparing means for comparing the adding results stored in said first and second memory means, said first memory means further storing data read out in the program verify mode in a block where inconsistency is detected and in response to assignment of a read-out address, when the inconsistency of the adding results is detected by said comparing means, said second memory means further storing data read out in the erase verify mode in response to assignment of the same address as the read-out address, said flash memory further comprising: rewrite control means for controlling the rewrite of data of a memory cell corresponding to data where inconsistency is detected by said comparing means; read address incrementing means for incrementing the read-out address, when coincidence is detected by said comparing means or after the rewrite by said rewrite control means; and block address incrementing means for incrementing the block address, when coincidence of the adding results is detected by said comparing means or after the rewrite by said rewrite control means.

Claim 9

A flash memory having data refresh function, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said flash memory comprising: control means for assigning addresses of the plural blocks in sequence and assigning a read-out address in the assigned block, and for setting the program verify mode and the erase verify mode in different reading timing during data refresh operation; first memory means for storing an adding result of data read out from all memory cells in one block corresponding to a block address assigned by said control means in the program verify mode; second memory means for storing an adding result of data read out from all memory cells in said one block in the erase verify mode; and comparing means for comparing the adding results stored in said first and second memory means, said first memory means further storing data read out in the program verify mode in a block where inconsistency is detected and in response to assignment of a read-out address, when the inconsistency of the adding results is detected by said comparing means, said second memory means further storing data read out in the erase verify mode in response to assignment of the same address as the read-out address, said flash memory further comprising: rewrite control means for controlling the rewrite of data of a memory cell corresponding to data where inconsistency is detected by said comparing means; read address incrementing means for incrementing the read-out address, when coincidence is detected by said comparing means or after the rewrite by said rewrite control means; and block address incrementing means for incrementing the block address, when coincidence of the adding results is detected by said comparing means or after the rewrite by said rewrite control means.

Claim 10

Data refresh method of a flash memory for retrieving and correcting defective data, permitting verify operation of writing and erasing data to a memory cell utilizing program verify mode and erase verify mode, said method comprising: step of reading data in the program verify mode in response to assignment of a read-out address; step of reading data in the erase verify mode in response to assignment of the same address as the read-out address; step of comparing the data read out; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparing step.

Claim 11

Data refresh method of a flash memory for retrieving and correcting defective data, permitting verify operation of writing and erasing data to a memory cell utilizing program verify mode and erase verify mode, said method comprising: step of reading data in the program verify mode in response to assignment of a read-out address; step of reading data in the erase verify mode in response to assignment of the same address as the read-out address; step of comparing the data read out; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparing step.

Claim 12

Data refresh method of a flash memory as set forth in claim 7, further comprising: step of storing data read out in the program verify mode in response to assignment of a read-out address before the comparing step; step of storing data read out in the erase verify mode in response to assignment of the same address as the read-out address before the comparing step; and step of incrementing the read-out address, when coincidence is detected by the comparison or after the rewrite.

Claim 13

Data refresh method of a flash memory as set forth in claim 8, wherein in the storing step, data comprising one or more bits read out from one or more memory cells are stored in response to one read-out address, and in the rewriting step, when inconsistent bits are detected by the comparison, only data of a memory cell corresponding to the inconsistent bits are rewritten.

Claim 14

Data refresh method of a flash memory as set forth in claim 9, wherein in the rewriting step, data of a memory cell corresponding to the inconsistent bits are rewritten in information write state.

Claim 15

Data refresh method of a flash memory, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said method comprising: step of adding data read out from all memory cells in one block of the plural blocks in the program verify mode; step of adding data read out from all memory cells in the same block as said one block in the erase verify mode; step of comparing the adding results; step of comparing data read out in the program verify mode in response to assignment of a read-out address and data read out in the erase verify mode in response to assignment of the same address as the read-out address, in a block where inconsistency of the adding results is detected by the comparison; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparison.

Claim 16

Data refresh method of a flash memory, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said method comprising: step of adding data read out from all memory cells in one block of the plural blocks in the program verify mode; step of adding data read out from all memory cells in the same block as said one block in the erase verify mode; step of comparing the adding results; step of comparing data read out in the program verify mode in response to assignment of a read-out address and data read out in the erase verify mode in response to assignment of the same address as the read-out address, in a block where inconsistency of the adding results is detected by the comparison; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparison.

Claim 17

Data refresh method of a flash memory, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said method comprising: step of assigning block addresses of the plural blocks in sequence and assigning a read-out address in the assigned block and setting the program verify mode and the erase verify mode in different reading timing during the data refresh operation; step of storing an adding result of data read out from all memory cells in one block corresponding to the assigned block address in the program verify mode; step of storing an adding result of data read out from all memory cells in said one block in the erase verify mode; step of comparing the stored adding results; step of storing data read out in the program verify mode in response to assignment of a read-out address by said control means, in a block where inconsistency of the adding results is detected by the comparison; step of storing data read out in the erase verify mode in response to assignment of the same address as the read-out address; step of comparing the stored data; step of rewriting data of a memory cell corresponding to data where coincidence is detected by the comparison; step of incrementing the read-out address, when coincidence is detected by the comparing step or after the rewriting step; and step of incrementing the block address, when coincidence of the adding results is detected by the comparison or after the rewrite by the rewriting step.

Claim 18

Data refresh method of a flash memory, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said method comprising: step of assigning block addresses of the plural blocks in sequence and assigning a read-out address in the assigned block and setting the program verify mode and the erase verify mode in different reading timing during the data refresh operation; step of storing an adding result of data read out from all memory cells in one block corresponding to the assigned block address in the program verify mode; step of storing an adding result of data read out from all memory cells in said one block in the erase verify mode; step of comparing the stored adding results; step of storing data read out in the program verify mode in response to assignment of a read-out address by said control means, in a block where inconsistency of the adding results is detected by the comparison; step of storing data read out in the erase verify mode in response to assignment of the same address as the read-out address; step of comparing the stored data; step of rewriting data of a memory cell corresponding to data where coincidence is detected by the comparison; step of incrementing the read-out address, when coincidence is detected by the comparing step or after the rewriting step; and step of incrementing the block address, when coincidence of the adding results is detected by the comparison or after the rewrite by the rewriting step.

Claim 19

Data refresh method of a flash memory, permitting verify operation of writing and erasing data to a memory cell utilizing program verify mode and erase verify mode, said method comprising: step of reading data in the erase verify mode in response to assignment of a read-out address; step of reading data in the program verify mode in response to assignment of the same address as the read-out address; step of comparing the data read out; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparing step.

Claim 20

Data refresh method of a flash memory, permitting verify operation of writing and erasing data to a memory cell utilizing program verify mode and erase verify mode, said method comprising: step of reading data in the erase verify mode in response to assignment of a read-out address; step of reading data in the program verify mode in response to assignment of the same address as the read-out address; step of comparing the data read out; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparing step.

Claim 21

Data refresh method of a flash memory, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said method comprising: step of adding data read out from all memory cells in one block of the plural blocks in the erase verify mode; step of adding data read out from all memory cells in the same block as said one block in the program verify mode; step of comparing the adding results; step of comparing data read out in the erase verify mode in response to assignment of a read-out address and data read out in the program verify mode in response to assignment of the same address as the read-out address, in a block where inconsistency of the adding results is detected by the comparison; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparison.

Claim 22

Data refresh method of a flash memory, permitting verify operation of writing and erasing data utilizing program verify mode and erase verify mode and comprising plural blocks each comprising plural memory cells, said method comprising: step of adding data read out from all memory cells in one block of the plural blocks in the erase verify mode; step of adding data read out from all memory cells in the same block as said one block in the program verify mode; step of comparing the adding results; step of comparing data read out in the erase verify mode in response to assignment of a read-out address and data read out in the program verify mode in response to assignment of the same address as the read-out address, in a block where inconsistency of the adding results is detected by the comparison; and step of rewriting data of a memory cell corresponding to inconsistent data, when the inconsistent data are detected by the comparison.