Patent US5569936A successfully refreshed from Google Patents.
US5569936A
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Semiconductor device employing crystallization catalyst
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1994-03-08
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Granted: 1996-10-29
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Expires: 2014-03-08
Abstract
Abstract A substance containing a catalyst element is formed so as to closely contact with an amorphous silicon film, or a catalyst element is introduced into the amorphous silicon film. The amorphous silicon film is annealed at a temperature which is lower than a crystallization temperature of usual amorphous silicon, thereby selectively crystallizing the amorphous silicon film. The crystallized region is used as a crystalline silicon TFT which can be used in a peripheral driver circuit of an active matrix circuit. The region which remains amorphous is used as an amorphous silicon TFT which can be used in a pixel circuit. A relatively small amount of a catalyst element for promoting crystallization is added to an amorphous silicon film, and an annealing process is conducted at a temperature which is lower than the distortion temperature of a substrate, thereby crystallizing the amorphous silicon film. A gate insulating film, and a gate electrode are then formed, and an impurity is implanted in a self-alignment manner. A film containing a catalyst element for promoting crystallization is closely contacted with the impurity region, or a relatively large amount of a catalyst element is introduced into the impurity region by an ion implantation or the like. Then, an annealing process is conducted at a temperature which is lower than the distortion temperature of the substrate, thereby activating the doping impurity.
Inventors
- 👤 Hongyong Zhang
- 👤 Hideki Uochi
- 👤 Toru Takayama
- 👤 Yasuhiko Takemura
- 👤 Mutsuo Yamamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:45
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/8311; H10P; H10P14/00; H10P14/20; H10P14/38; H10P14/3802; H10P14/3806; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/673; H10D30/6731; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/02; H10D84/03; H10D84/038; H10D84/85; H10D84/856; H10D86/00; H10D86/01; H10D86/021; H10D86/0221; H10D86/0223; H10D86/0225; H10D86/40; H10D86/431; H10D86/471; H10D86/60; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/1333; G02F1/1345; G02F1/13454; Y; Y10; Y10S; Y10S148/00; Y10S148/016
Claims Analysis
Total Claims: 37
Claim 1
Independent Claim
77 words
A transistor comprising: an active region comprising a crystalline silicon film provided on a substrate; and an impurity region provided adjacent to said active region, wherein said active region contains a catalyst element for promoting crystallization at a concentration in the range of 1×10 17 cm -3 to 1×10 20 cm -3 , and a concentration of said catalyst element in said impurity region is higher than the concentration of said catalyst element in said active region.
Claim 2
Dependent Claim
77 words
A transistor comprising: an active region comprising a crystalline silicon film provided on a substrate; and an impurity region provided adjacent to said active region, wherein said active region contains a catalyst element for promoting crystallization at a concentration in the range of 1×10 17 cm -3 to 1×10 20 cm -3 , and a concentration of said catalyst element in said impurity region is higher than the concentration of said catalyst element in said active region.
Claim 3
Dependent Claim
19 words
The transistor of claim 1 wherein said catalyst element is at least one of nickel, iron, cobalt, and platinum.
Claim 4
Dependent Claim
22 words
The transistor of claim 1 wherein the concentration of said catalyst element is a value measured by the secondary ion mass spectrometry.
Claim 5
Dependent Claim
80 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon film provided on a substrate; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon film is in the range of 10 17 cm -3 to 10 20 cm -3 , and a concentration of a catalyst element in said amorphous silicon film is lower than 10 17 cm -3 .
Claim 6
Dependent Claim
80 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon film provided on a substrate; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon film is in the range of 10 17 cm -3 to 10 20 cm -3 , and a concentration of a catalyst element in said amorphous silicon film is lower than 10 17 cm -3 .
Claim 7
Dependent Claim
24 words
The circuit of claim 4 wherein the concentration of said catalyst element in said crystalline silicon film is 5×10 18 cm -3 or higher.
Claim 8
Dependent Claim
24 words
The circuit of claim 4 wherein the concentration of said catalyst element in said amorphous silicon film is 1×10 16 cm -3 or lower.
Claim 9
Dependent Claim
19 words
The circuit of claim 4 wherein said catalyst element is at least one of nickel, iron, cobalt, and platinum.
Claim 10
Dependent Claim
19 words
The circuit of claim 4 wherein said another transistor is used as a transistor in an active matrix region.
Claim 11
Dependent Claim
25 words
The circuit of claim 4 wherein said transistor comprising an active region made of a crystalline silicon film is used in a shift register circuit.
Claim 12
Dependent Claim
43 words
The circuit of claim 4 wherein said concentration of said catalyst element in said crystalline silicon film and said concentration of said catalyst element in said amorphous silicon film are defined by minimum values which are measured by the secondary ion mass spectrometry.
Claim 13
Dependent Claim
78 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon film provided on a substrate, and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element contained in said crystalline silicon film is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is 10 times or more than that of a catalyst element contained in said amorphous silicon film.
Claim 14
Dependent Claim
78 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon film provided on a substrate, and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element contained in said crystalline silicon film is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is 10 times or more than that of a catalyst element contained in said amorphous silicon film.
Claim 15
Dependent Claim
70 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon film; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon film is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is higher than a concentration of a catalyst element in said amorphous silicon film.
Claim 16
Dependent Claim
70 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon film; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon film is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is higher than a concentration of a catalyst element in said amorphous silicon film.
Claim 17
Dependent Claim
91 words
A transistor comprising: a crystalline semiconductor island provided on a substrate and comprising an active region and an impurity region provided adjacent to said active region, wherein said crystalline semiconductor island has a thickness of 1000 Å or less, and said active region contains a catalyst element for promoting crystallization at a concentration in the range of 1×10 17 cm -3 to 1×10 20 cm -3 , and a concentration of said catalyst element in said impurity region is higher than the concentration of said catalyst element in said active region.
Claim 18
Dependent Claim
91 words
A transistor comprising: a crystalline semiconductor island provided on a substrate and comprising an active region and an impurity region provided adjacent to said active region, wherein said crystalline semiconductor island has a thickness of 1000 Å or less, and said active region contains a catalyst element for promoting crystallization at a concentration in the range of 1×10 17 cm -3 to 1×10 20 cm -3 , and a concentration of said catalyst element in said impurity region is higher than the concentration of said catalyst element in said active region.
Claim 19
Dependent Claim
92 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon island provided on a substrate, said crystalline silicon island having a thickness of 1000 Å or less; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon island is in the range of 10 17 cm -3 to 10 20 cm -3 , and a concentration of a catalyst element in said amorphous silicon film is lower than 10 17 cm -3 .
Claim 20
Dependent Claim
92 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon island provided on a substrate, said crystalline silicon island having a thickness of 1000 Å or less; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon island is in the range of 10 17 cm -3 to 10 20 cm -3 , and a concentration of a catalyst element in said amorphous silicon film is lower than 10 17 cm -3 .
Claim 21
Dependent Claim
89 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon island provided on a substrate, said crystalline silicon island having a thickness of 1000Å or less; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element contained in said crystalline silicon island is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is 10 times or more than that of a catalyst element contained in said amorphous silicon film.
Claim 22
Dependent Claim
89 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon island provided on a substrate, said crystalline silicon island having a thickness of 1000Å or less; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element contained in said crystalline silicon island is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is 10 times or more than that of a catalyst element contained in said amorphous silicon film.
Claim 23
Dependent Claim
77 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon island having a thickness of 1000Å or less; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon island is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is higher than a concentration of a catalyst element in said amorphous silicon film.
Claim 24
Dependent Claim
77 words
A semiconductor circuit comprising: a transistor comprising an active region made of a crystalline silicon island having a thickness of 1000Å or less; and another transistor comprising another active region made of an amorphous silicon film, wherein a concentration of a catalyst element in said crystalline silicon island is in the range of 1×10 17 cm -3 to 1×10 20 cm -3 and is higher than a concentration of a catalyst element in said amorphous silicon film.
Claim 25
Dependent Claim
99 words
A transistor comprising: a semiconductor island provided on a substrate and comprising a semiconductor active region containing a catalyst element and a semiconductor impurity region containing said catalyst element provided adjacent to said semiconductor active region, said semiconductor island having a thickness of 1000 Å or less, wherein said semiconductor active region contains said catalyst element at a concentration in the range of 1×10 17 cm -3 to 1×10 20 cm -3 , and a concentration of said catalyst element in said semiconductor impurity region is higher than a concentration of said catalyst element in said semiconductor active region.
Claim 26
Dependent Claim
99 words
A transistor comprising: a semiconductor island provided on a substrate and comprising a semiconductor active region containing a catalyst element and a semiconductor impurity region containing said catalyst element provided adjacent to said semiconductor active region, said semiconductor island having a thickness of 1000 Å or less, wherein said semiconductor active region contains said catalyst element at a concentration in the range of 1×10 17 cm -3 to 1×10 20 cm -3 , and a concentration of said catalyst element in said semiconductor impurity region is higher than a concentration of said catalyst element in said semiconductor active region.
Claim 27
Dependent Claim
203 words
An electro-optical device comprising: a substrate having a pixel region and a peripheral circuit region; a first plurality of thin film transistors formed over said pixel region of said substrate, each of said first plurality of thin film transistors comprising a gate electrode, a gate insulating layer formed on said gate electrode and a first semiconductor layer formed on said gate insulating layer; and a second plurality of thin film transistors formed over said peripheral circuit region of said substrate for driving said first plurality of thin film transistors, each of said second plurality of thin film transistors comprising a second semiconductor layer, a gate insulating film formed adjacent to said second semiconductor layer and a gate electrode adjacent to said second semiconductor layer, wherein each first semiconductor layer of the first plurality of thin film transistors has a lower crystallinity than each second semiconductor layer of the second plurality of thin film transistors, and wherein a concentration of a catalyst element in said second semiconductor layer is in the range of 10 17 cm -3 to 10 20 cm -3 , and a concentration of a catalyst element in said each first semiconductor layer is lower than 10 17 cm -3 .
Claim 28
Dependent Claim
203 words
An electro-optical device comprising: a substrate having a pixel region and a peripheral circuit region; a first plurality of thin film transistors formed over said pixel region of said substrate, each of said first plurality of thin film transistors comprising a gate electrode, a gate insulating layer formed on said gate electrode and a first semiconductor layer formed on said gate insulating layer; and a second plurality of thin film transistors formed over said peripheral circuit region of said substrate for driving said first plurality of thin film transistors, each of said second plurality of thin film transistors comprising a second semiconductor layer, a gate insulating film formed adjacent to said second semiconductor layer and a gate electrode adjacent to said second semiconductor layer, wherein each first semiconductor layer of the first plurality of thin film transistors has a lower crystallinity than each second semiconductor layer of the second plurality of thin film transistors, and wherein a concentration of a catalyst element in said second semiconductor layer is in the range of 10 17 cm -3 to 10 20 cm -3 , and a concentration of a catalyst element in said each first semiconductor layer is lower than 10 17 cm -3 .
Claim 29
Dependent Claim
23 words
The electro-optical device of claim 18 wherein each first semiconductor layer of the first plurality of thin film transistors is an amorphous semiconductor.
Claim 30
Dependent Claim
23 words
The electro-optical device of claim 19 wherein each second semiconductor layer of the second plurality of thin film transistors is a crystalline semiconductor.
Claim 31
Dependent Claim
59 words
The electro-optical device of claim 18 wherein each first semiconductor layer of the first plurality of thin film transistors comprises source and drain semiconductor regions and a channel region extending therebetween, wherein said source and drain regions are formed in a self-alignment manner with respect to said gate electrode of each of the first plurality of thin film transistors.
Claim 32
Dependent Claim
28 words
The electro-optical device of claim 18 wherein the gate electrode of each of the second plurality of thin film transistors is located over the second semiconductor layer thereof.
Claim 33
Dependent Claim
207 words
An electro-optical device comprising: a substrate having a pixel region and a peripheral circuit region; a first plurality of thin film transistors formed over said pixel region of said substrate, each of said first plurality of thin film transistors comprising a gate electrode, a gate insulating layer formed on said gate electrode and a first semiconductor layer formed on said gate insulating layer; and a second plurality of thin film transistors formed over said peripheral circuit region of said substrate for driving said first plurality of thin film transistors, each of said second plurality of thin film transistors comprising a second semiconductor layer, a gate insulating film adjacent to said second semiconductor layer and a gate electrode adjacent to said second semiconductor layer, wherein only each second semiconductor layer of the second plurality of thin film transistors is doped with a catalyst for promoting a crystallization thereof at a concentration in the range of 10 17 cm -3 to 10 20 cm -3 while each first semiconductor layer of the first plurality of thin film transistors is not doped with a catalyst for promoting a crystallization thereof and a concentration of a catalyst element in said first semiconductor layer is lower than 10 17 cm -3 .
Claim 34
Dependent Claim
207 words
An electro-optical device comprising: a substrate having a pixel region and a peripheral circuit region; a first plurality of thin film transistors formed over said pixel region of said substrate, each of said first plurality of thin film transistors comprising a gate electrode, a gate insulating layer formed on said gate electrode and a first semiconductor layer formed on said gate insulating layer; and a second plurality of thin film transistors formed over said peripheral circuit region of said substrate for driving said first plurality of thin film transistors, each of said second plurality of thin film transistors comprising a second semiconductor layer, a gate insulating film adjacent to said second semiconductor layer and a gate electrode adjacent to said second semiconductor layer, wherein only each second semiconductor layer of the second plurality of thin film transistors is doped with a catalyst for promoting a crystallization thereof at a concentration in the range of 10 17 cm -3 to 10 20 cm -3 while each first semiconductor layer of the first plurality of thin film transistors is not doped with a catalyst for promoting a crystallization thereof and a concentration of a catalyst element in said first semiconductor layer is lower than 10 17 cm -3 .
Claim 35
Dependent Claim
23 words
The electro-optical device of claim 23 wherein said catalyst comprises a metal selected from the group consisting of nickel, iron, cobalt and platinum.
Claim 36
Dependent Claim
59 words
The electro-optical device of claim 23 wherein each first semiconductor layer of the first plurality of thin film transistors comprises source and drain semiconductor regions and a channel region extending therebetween, wherein said source and drain regions are formed in a self-alignment manner with respect to said gate electrode of each of the first plurality of thin film transistors.
Claim 37
Dependent Claim
28 words
The electro-optical device of claim 23 wherein the gate electrode of each of the second plurality of thin film transistors is located over the second semiconductor layer thereof.
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