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US5569627A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for etching copper containing metallic film and for forming copper containing metallic wiring

Assignee: Sony Corp
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Filing: 1995-07-25
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Granted: 1996-10-29
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Expires: 2015-07-25
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Abstract

Abstract A method for forming a copper wiring in a semiconductor device utilizes a copper film with a pattern mask thereon. Exposed portions of the copper film are etched to form a copper wiring. An insulation film is deposited over the copper wiring, including on side walls thereof. A portion of the insulation film is removed to leave an insulation film substantially only on side walls of the copper which is thinner than before the removing. A first dielectric film is formed between the copper wiring up to a top of the pattern mask but not on top of the pattern mask in order to embed and flatten regions between the copper wiring and pattern mask so that the regions are substantially level with the top of the pattern mask. A second dielectric layer is formed on the first dielectric layer to provide a flat surface over the copper wiring and pattern mask.

Inventors

  • 👤 Keiji Shinohara
  • 👤 Junichi Sato
  • 👤 Yukihiro Kamide
  • 👤 Toshiharu Yanagida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 18:37
CPC Classifications
C; C23; C23F; C23F4/00; H; H10; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/063

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 155 words
A method for forming a copper wiring in a semiconductor device, comprising the steps of: providing a pattern mask on a copper film; etching exposed portions of the copper film to form a copper wiring; depositing an insulation film over the copper wiring and including on side walls thereof; removing a portion of the insulation film to leave an insulation film substantially only on side walls of the copper wiring which is thinner than before the removing; forming a first dielectric film between the copper wiring up to a top of the pattern mask but not on top of the pattern mask so as to embed and flatten regions between the copper wiring and pattern mask so that those regions are substantially level with the top of the pattern mask; and forming a second dielectric layer on the first dielectric layer so as to provide a flat surface over the copper wiring and pattern mask.
Claim 2
Independent Claim 155 words
A method for forming a copper wiring in a semiconductor device, comprising the steps of: providing a pattern mask on a copper film; etching exposed portions of the copper film to form a copper wiring; depositing an insulation film over the copper wiring and including on side walls thereof; removing a portion of the insulation film to leave an insulation film substantially only on side walls of the copper wiring which is thinner than before the removing; forming a first dielectric film between the copper wiring up to a top of the pattern mask but not on top of the pattern mask so as to embed and flatten regions between the copper wiring and pattern mask so that those regions are substantially level with the top of the pattern mask; and forming a second dielectric layer on the first dielectric layer so as to provide a flat surface over the copper wiring and pattern mask.
Claim 3
Dependent Claim 44 words
A method according to claim 1 wherein the copper film is provided on a layer insulation film and the step of etching to form the wiring occurs down to and no lower than the layer insulation film on which the copper film is provided.
Claim 4
Dependent Claim 41 words
A method according to claim 1 including the step of removing said portion of the insulation film to leave said insulation film on side walls of the copper wiring which is thinner than before the removing by a magnetic-field plasma etching.

References Cited (Backward Citations)

US4466859A Cited
US4468284A Cited
US4775550A Cited
US4983546A Cited
US5082801A Cited
US5275972A Cited
US5037777A Cited
US5268332A Cited
US5445998A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-10-29 2000-04-29 2000-10-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-10-29 2004-04-29 2004-10-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-10-29 2008-04-29 2008-10-29 $7700.00 Window Closed / Lapsed

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