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US5555393A
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Method and apparatus for a cache memory with data priority order information for individual data entries
Assignee: Panasonic Holdings Corp
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Filing: 1995-10-27
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Granted: 1996-09-10
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Expires: 2015-10-27
Abstract
Abstract A method and an apparatus for cache lock control are designed for use with a cache memory. The cache memory has divided entries each for storing data and cache lock information. Updating of data in each of the entries of the cache memory is controlled in response to cache priority order information in each of the entries of the cache memory.
Inventors
- 👤 Tetsuya Tanaka
- 👤 Takashi Taniguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 14:52
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/12; G06F12/121; G06F12/126
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
106 words
An apparatus for cache lock control, comprising: a cache memory having divided entries each for storing data and priority order information; an address translator having divided entries each for storing priority order information; means for selecting one of tile entries of the cache memory and one of the entries of the address translator; means for comparing priority order information in the selected entry of the cache memory and priority order information in the selected entry of the address translator; and means for controlling updating of data in the selected entry of the cache memory in response to a result of said comparing by the comparing means.
Claim 2
Independent Claim
106 words
An apparatus for cache lock control, comprising: a cache memory having divided entries each for storing data and priority order information; an address translator having divided entries each for storing priority order information; means for selecting one of tile entries of the cache memory and one of the entries of the address translator; means for comparing priority order information in the selected entry of the cache memory and priority order information in the selected entry of the address translator; and means for controlling updating of data in the selected entry of the cache memory in response to a result of said comparing by the comparing means.
Claim 3
Independent Claim
105 words
A method of cache lock control, comprising the steps of: storing data and priority order information into each of divided entries of a cache memory: storing priority order information into each of divided entries of an address translator; selecting one of the entries of the cache memory and one of the entries of the address translator; comparing priority order information in the selected entry of the cache memory and priority order information in the selected entry of the address translator: and controlling updating of data in the selected entry of the cache memory in response to a result of said comparing by the comparing step.
Claim 4
Independent Claim
105 words
A method of cache lock control, comprising the steps of: storing data and priority order information into each of divided entries of a cache memory: storing priority order information into each of divided entries of an address translator; selecting one of the entries of the cache memory and one of the entries of the address translator; comparing priority order information in the selected entry of the cache memory and priority order information in the selected entry of the address translator: and controlling updating of data in the selected entry of the cache memory in response to a result of said comparing by the comparing step.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-10 | 2000-03-11 | 2000-09-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-10 | 2004-03-11 | 2004-09-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-10 | 2008-03-11 | 2008-09-10 | $7700.00 | Window Closed / Lapsed |