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Magnetic recording channel employing a non-ideal d.c.-free equalizer and a d.c.-free modulation code

Assignee: Eastman Kodak Co
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Filing: 1992-12-11
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Granted: 1996-08-27
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Expires: 2012-12-11
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Abstract

Abstract A channel for magnetic recording systems that employs (1+D) n PR equalization, omitting the (1-D) factor. PR2 ((1+D) 2 ) is the preferred embodiment of the present invention and PR1 (1+D) is also of interest. The signal is equalized for a pulse response that approximates the ideal pulse response, but has zero d.c. content. An equalizer having two classes of pulse response meeting these criteria are described, each suitable for use with different types of playback heads.

Inventors

  • 👤 Norman L. Koren

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 14:40
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; G11B20/10009

Claims Analysis

Total Claims: 44
Claim 1
Independent Claim 110 words
A magnetic recording system for storing and retrieving binary data, said system comprising: encoder means for receiving signals representing said binary data and for encoding said binary data with a d.c. free charge-controlled modulation code characterized by (d, k) run length constraints, the modulation code having an associated code rate; equalizer means, coupled to said encoder means, having a pulse response that approximates a (1+D) n partial response polynomial and is zero at d.c. for producing equalized pulses in response to said encoded binary data; detector means, coupled to said equalizer means, for detecting said equalized pulses; and decoder means, coupled to said detector means, for decoding said equalized pulses.
Claim 2
Dependent Claim 110 words
A magnetic recording system for storing and retrieving binary data, said system comprising: encoder means for receiving signals representing said binary data and for encoding said binary data with a d.c. free charge-controlled modulation code characterized by (d, k) run length constraints, the modulation code having an associated code rate; equalizer means, coupled to said encoder means, having a pulse response that approximates a (1+D) n partial response polynomial and is zero at d.c. for producing equalized pulses in response to said encoded binary data; detector means, coupled to said equalizer means, for detecting said equalized pulses; and decoder means, coupled to said detector means, for decoding said equalized pulses.
Claim 3
Dependent Claim 28 words
The system as in claim 1 wherein said modulation code is further constrained by limiting the run length of code patterns requiring a transition for every clock period.
Claim 4
Dependent Claim 12 words
The system as in claim 1 wherein said code rate is 8/10.
Claim 5
Dependent Claim 12 words
The system as in claim 3 wherein said d constraint is zero.
Claim 6
Dependent Claim 12 words
The system as in claim 3 wherein said k constraint is three.
Claim 7
Dependent Claim 56 words
The system as in claim 1 wherein said equalizer has an antisymmetrical step response target, G QI , and a symmetrical pulse response target, F QI , approximated by ##EQU5## where ƒ=frequency, ƒ c =cutoff frequency given by 1/T where T is the clock period, ƒ L =a frequency related to pulse rise and fall times.
Claim 8
Dependent Claim 10 words
The system as in claim 6 wherein T=T min .
Claim 9
Dependent Claim 15 words
The system as in claim 6 wherein said equalizer is a PR2 equalizer and n=2.
Claim 10
Dependent Claim 18 words
The system as in claim 6 wherein said equalizer means has a pulse response of zero at d.c.
Claim 11
Dependent Claim 57 words
The system as in claim 1 wherein said equalizer has a causal step response target, G INT , and a causal pulse response target, F INT , approximated by: ##EQU6## where ƒ=frequency, ƒ c =cutoff frequency given by 1/T where T is the clock period, ƒ L =a frequency inversely related to pulse rise and fall times.
Claim 12
Dependent Claim 38 words
The system as in claim 10 wherein said equalizer is a PR2 equalizer and n=2 for use in systems where a substantial portion of the unequalized pulse energy is concentrated within twice the minimum interval between recorded transitions.
Claim 13
Dependent Claim 19 words
The system as in claim 6 or 10 wherein said equalizer means has a finite step response at d.c.
Claim 14
Dependent Claim 17 words
The system as in claim 6 or 10 wherein said equalizer is a PR1 equalizer and n=1.
Claim 15
Dependent Claim 38 words
The system as in claim 1 wherein said equalizer is characterized by poles and zeroes in the transfer function therefor, said transfer function having no poles and zeroes for approximating a (1-D) factor in said partial response polynomial.
Claim 16
Dependent Claim 16 words
The system as in claim 1 wherein said approximated partial response polynomial has no (1-D) factor.
Claim 17
Dependent Claim 17 words
The system as in claim 1 wherein said modulation code has a maximum accumulated charge of two.
Claim 18
Dependent Claim 22 words
The system as in claim 1 wherein said modulation code is a modified R-DAT code having a maximum accumulated charge of three.
Claim 19
Dependent Claim 54 words
In a system for storing and retrieving digital data having encoder means for receiving and encoding signals representing said data, an equalizer coupled to said encoder having a pulse response that approximates a (I+D) n partial response polynomial and is zero at d.c. for producing equalized pulses in response to said encoded digital data.
Claim 20
Dependent Claim 54 words
In a system for storing and retrieving digital data having encoder means for receiving and encoding signals representing said data, an equalizer coupled to said encoder having a pulse response that approximates a (I+D) n partial response polynomial and is zero at d.c. for producing equalized pulses in response to said encoded digital data.
Claim 21
Dependent Claim 27 words
In the system as in claim 18 wherein said digital data is encoded with a d.c. free charge-controlled modulation code characterized by (d, k) run length constraints.
Claim 22
Dependent Claim 28 words
The system as in claim 19 wherein said modulation code is further constrained by limiting the run length of code patterns requiring a transition for every clock period.
Claim 23
Dependent Claim 16 words
The system as in claim 18 wherein said approximated partial response polynomial has no (1-D) factor.
Claim 24
Dependent Claim 38 words
The system as in claim 18 wherein said equalizer is characterized by poles and zeroes in the transfer function therefore, said transfer function having no poles and zeroes for approximating a (1-D) factor in said partial response polynomial.
Claim 25
Independent Claim 75 words
A method for storing and retrieving binary data, said method comprising the steps of: receiving signals representing said binary data; encoding said binary data with a d.c. free charge-controlled modulation code characterized by (d, k) run-length constraints; producing equalized pulses in response to said encoded binary data in accordance with a pulse response that approximates a (1+D) n partial response polynominal and is zero at d.c.; detecting said equalized pulses; and decoding said equalized pulses.
Claim 26
Independent Claim 75 words
A method for storing and retrieving binary data, said method comprising the steps of: receiving signals representing said binary data; encoding said binary data with a d.c. free charge-controlled modulation code characterized by (d, k) run-length constraints; producing equalized pulses in response to said encoded binary data in accordance with a pulse response that approximates a (1+D) n partial response polynominal and is zero at d.c.; detecting said equalized pulses; and decoding said equalized pulses.
Claim 27
Dependent Claim 35 words
The method as in claim 23 wherein said step of encoding includes the step of further constraining the modulation code by limiting the run length of code patterns requiring a transition for every clock period.
Claim 28
Dependent Claim 70 words
The method as in claim 23 wherein said step of producing equalized pulses further includes the step of producing said equalized pulses in accordance with a step response, G QI , and said pulse response, F QI , are given by ##EQU7## where ƒ=frequency, ƒ c =cutoff frequency given by 1/T where T is the clock period and ƒ L =a frequency inversely related to pulse rise and fall times.
Claim 29
Dependent Claim 15 words
The system as in claim 25 wherein said equalizer is a PR2 equalizer and n=2.
Claim 30
Dependent Claim 14 words
The method as in claim 25 wherein said step response is finite at d.c.
Claim 31
Dependent Claim 14 words
The method as in claim 27 wherein said pulse response is zero at d.c.
Claim 32
Dependent Claim 74 words
The method as in claim 23 wherein said step of producing equalized pulses includes the step of producing said equalized pulses in accordance with a step response target, G INT , and a pulse response target, F INT , given by the following equations, respectively: ##EQU8## where ƒ=frequency, ƒ c =cutoff frequency given by 1/T where T is the clock period, ƒ L =sample frequency inversely related to the pulse rise and fall times.
Claim 33
Dependent Claim 31 words
The method as in claim 29 wherein n=2 for use in systems where a substantial portion of the unequalized pulse energy is concentrated within twice the minimum interval between recorded transitions.
Claim 34
Dependent Claim 8 words
The method as in claim 29 wherein n=1.
Claim 35
Dependent Claim 47 words
The method as in claim 23 wherein the step of producing equalized pulses further includes the step of characterizing the transfer function of said step by poles and zeroes, said transfer function having no poles and zeroes for approximating a (1-D) factor in said partial response polynomial.
Claim 36
Dependent Claim 16 words
The method as in claim 23 wherein said approximated partial response polynomial has no (1-D) factor.
Claim 37
Dependent Claim 17 words
The method as in claim 23 wherein said modulation code has a maximum accumulated charge of two.
Claim 38
Dependent Claim 17 words
The method as in claim 23 wherein said modulation code has a maximum accumulated charge of three.
Claim 39
Dependent Claim 54 words
In a method for storing and retrieving digital data having the steps of receiving and encoding signals representing said data, further including the step of producing equalized pulses in response to said encoded signals in accordance with an equalizer pulse response that approximates a (1+D) n partial response polynomial and is zero at d.c.
Claim 40
Dependent Claim 54 words
In a method for storing and retrieving digital data having the steps of receiving and encoding signals representing said data, further including the step of producing equalized pulses in response to said encoded signals in accordance with an equalizer pulse response that approximates a (1+D) n partial response polynomial and is zero at d.c.
Claim 41
Dependent Claim 31 words
In the method as in claim 36 wherein said step of encoding includes the steps of encoding with a d.c. free charge-controlled modulation code characterized by (d, k) run length constraints.
Claim 42
Dependent Claim 35 words
The method as in claim 37 wherein said step of encoding includes the step of further constraining said modulation code by limiting the run length of code patterns requiring a transition for every clock period.
Claim 43
Dependent Claim 16 words
The method as in claim 36 wherein said approximated partial response polynomial has no (1-D) factor.
Claim 44
Dependent Claim 47 words
The method as in claim 36 wherein said step of producing equalized pulses further includes the step of characterizing the transfer function of said step by poles and zeroes, said transfer function having no poles and zeroes for approximating a (1-D) factor in said partial response polynomial.

References Cited (Backward Citations)

US4081756A Cited
US4675650A Cited
US5166955A Cited
US5220466A Cited
US5233482A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-08-27 2000-02-26 2000-08-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-08-27 2004-02-26 2004-08-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-08-27 2008-02-26 2008-08-27 $7700.00 Window Closed / Lapsed

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