US5550085A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for making a buried contact
Assignee: Winbond Electronics Corp
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Filing: 1995-09-07
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Granted: 1996-08-27
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Expires: 2015-09-07
Abstract
Abstract A method of forming damage-free buried contacts in a semiconductor substrate without the trenches and pitted areas can be carried out by forming a silicon oxide layer as a gate dielectric layer on top of the substrate, forming a first polysilicon layer on top of the silicon oxide layer, anisotropically etching away the first polysilicon layer by using a first mask and a first etching gas that has high etching selectivity between polysilicon and silicon oxide such that a first portion of the polysilicon layer is left on the top surface of the substrate except the area defining a buried contact, forming in the substrate a zone of a second conductivity type at the area defining the buried contact by implanting impurity ions, removing the silicon oxide layer over the area defining the buried contact and removing the masking layer over the first portion of the polysilicon layer, depositing sequentially a conducting layer and a second polysilicon layer, anisotropically etching the second polysilicon layer over an area defining a transistor gate electrode and interconnect by using a second mask and a second etching gas that has high etching selectivity between polysilicon and the conducting layer, anisotropically etching the conducting layer over the area defining the transistor gate electrode and interconnect by a third etching gas that has high etching selectivity between the conducting layer, the polysilicon layer and the silicon layer, and optionally removing the residual polysilicon in the transistor gate electrode and interconnect by heating to a temperature of not less than 800° C. in an O 2 or H 2 O ambient.
Inventors
- 👤 Min-Sea Liu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:37
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/0698
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
229 words
A method of forming a buried contact in a semiconductor silicon substrate of a first conductivity type having a top surface comprising the steps of: forming a silicon oxide layer on said top surface of the substrate, forming a first polysilicon layer over said silicon oxide layer, etching said first polysilicon layer by using a first mask and a first etching gas having etching selectivity between polysilicon and silicon oxide such that a first portion of said polysilicon layer is left on the top surface of said substrate except the area defining said buried contact, forming in said substrate a zone of a second conductivity type at the area defining the buried contact by implanting impurity ions, removing the silicon oxide layer over said area defining said buried contact and removing the first mask over said first portion of said polysilicon layer, blanket depositing sequentially a conducting layer and a second polysilicon layer, etching said second polysilicon layer over an area defining a transistor gate electrode and interconnect by using a second mask and a second etching gas having high etching selectivity between polysilicon and the conducting layer, using the conducting layer as an etch stop, and etching said conducting layer over said area defining said transistor gate electrode and interconnect by a third etching gas having etching selectivity between 1) the conducting layer, and 2) polysilicon and silicon.
Claim 2
Independent Claim
229 words
A method of forming a buried contact in a semiconductor silicon substrate of a first conductivity type having a top surface comprising the steps of: forming a silicon oxide layer on said top surface of the substrate, forming a first polysilicon layer over said silicon oxide layer, etching said first polysilicon layer by using a first mask and a first etching gas having etching selectivity between polysilicon and silicon oxide such that a first portion of said polysilicon layer is left on the top surface of said substrate except the area defining said buried contact, forming in said substrate a zone of a second conductivity type at the area defining the buried contact by implanting impurity ions, removing the silicon oxide layer over said area defining said buried contact and removing the first mask over said first portion of said polysilicon layer, blanket depositing sequentially a conducting layer and a second polysilicon layer, etching said second polysilicon layer over an area defining a transistor gate electrode and interconnect by using a second mask and a second etching gas having high etching selectivity between polysilicon and the conducting layer, using the conducting layer as an etch stop, and etching said conducting layer over said area defining said transistor gate electrode and interconnect by a third etching gas having etching selectivity between 1) the conducting layer, and 2) polysilicon and silicon.
Claim 3
Dependent Claim
14 words
A method according to claim 1, wherein said first conductivity type is P- type.
Claim 4
Dependent Claim
14 words
A method according to claim 1, wherein said second conductivity type is N- type.
Claim 5
Dependent Claim
28 words
A method according to claim 1, wherein said silicon oxide layer on said top surface of the substrate is formed by thermal oxidation or by chemical vapor deposition.
Claim 6
Dependent Claim
24 words
A method according to claim 1, wherein said silicon oxide layer formed on said top surface of the substrate is a gate dielectric layer.
Claim 7
Dependent Claim
17 words
A method according to claim 1, wherein said first polysilicon layer is formed by chemical vapor deposition.
Claim 8
Dependent Claim
22 words
A method according to claim 1, wherein said first polysilicon layer has a thickness of between about 10 to about 70 nm.
Claim 9
Dependent Claim
47 words
A method according to claim 1, wherein said first etching gas is selected from the group consisting of SiCl 3 /Cl 2 , BCl 3 /Cl 2 , HBr/Cl 2 /O 2 , HBr/O 2 , Br 2 /SF 6 , and SF 6 /O 2 .
Claim 10
Dependent Claim
17 words
A method according to claim 1, wherein said impurity ions implanted are P ions or As ions.
Claim 11
Dependent Claim
37 words
A method according to claim 1, wherein said impurity ions implanted are P ions at an energy level between about 10 and about 80 Kev and a dosage level between about 1E15 and about 8E15/cm 2 .
Claim 12
Dependent Claim
37 words
A method according to claim 1, wherein said impurity ions implanted are As ions at an energy level between about 10 and about 100 Kev and a dosage level between about 1E15 and about 7E15/cm 2 .
Claim 13
Dependent Claim
27 words
A method according to claim 1 further comprising the step of annealing said substrate at a temperature higher than about 800° C. after said ion implantation step.
Claim 14
Dependent Claim
14 words
A method according to claim 1, wherein said conducting layer by TiN or TiW.
Claim 15
Dependent Claim
20 words
A method according to claim 1, wherein said conducting layer has a thickness between about 10 and about 100 nm.
Claim 16
Dependent Claim
19 words
A method according to claim 1, wherein said conducting layer is formed by either sputtering or chemical vapor deposition.
Claim 17
Dependent Claim
29 words
A method according to claim 1, wherein said second polysilicon layer is deposited to a thickness between about 150 and about 400 nm by a chemical vapor deposition process.
Claim 18
Dependent Claim
21 words
A method according to claim 1 further comprising the step of doping said second polysilicon layer with a phosphorus containing gas.
Claim 19
Dependent Claim
47 words
A method according to claim 1, wherein said second etching gas is selected from the group consisting of SiCl 3 /Cl 2 , BCl 3 /Cl 2 , HBr/Cl 2 /O 2 , HBr/O 2 , Br 2 /SF 6 , and SF 6 /O 2 .
Claim 20
Dependent Claim
19 words
A method according to claim 1, wherein said third etching gas is Cl 2 /Ar or SF 6 /Ar.
Claim 21
Dependent Claim
35 words
A method according to claim 1 further comprising the step of removing residual polysilicon in the transistor gate electrode and interconnect by a process including heating to a temperature of not less than 800° C.
Claim 22
Independent Claim
277 words
A method of forming a buried contact in a semiconductor substrate of a first conductivity type having a top surface comprising the steps of: forming a gate dielectric layer of silicon oxide on said top surface of the substrate, forming a first polysilicon layer over said silicon oxide layer, anisotropically etching said first polysilicon layer by using a first mask and a first etching gas having an etch rate for polysilicon and an etch rate for silicon oxide lower than the itch rate for polysilicon such that a first portion of said polysilicon layer is left on the top surface of said substrate except the area defining said buried contact, forming in said substrate a zone of a second conductivity type at the area defining the buried contact by implanting impurity ions, removing the silicon oxide layer over said area defining said buried contact, removing the first mask over said first portion of said polysilicon layer, depositing sequentially a conducting layer and a second polysilicon layer, anisotropically etching said second polysilicon layer over an area defining a transistor gate electrode and interconnect by using a second mask and a second etching gas having an etch rate for polysilicon and low etch rate for the conducting layer, anisotropically etching said conducting layer over said area defining said transistor gate electrode and interconnect by a third etching gas having an etch rate for said conducting layer and an etch rate for said polysilicon and silicon lower than the etch rate for said conducting layer, and removing residual polysilicon in the transistor gate electrode and interconnect by a process including heating to a temperature of not less than 800° C.
Claim 23
Independent Claim
277 words
A method of forming a buried contact in a semiconductor substrate of a first conductivity type having a top surface comprising the steps of: forming a gate dielectric layer of silicon oxide on said top surface of the substrate, forming a first polysilicon layer over said silicon oxide layer, anisotropically etching said first polysilicon layer by using a first mask and a first etching gas having an etch rate for polysilicon and an etch rate for silicon oxide lower than the itch rate for polysilicon such that a first portion of said polysilicon layer is left on the top surface of said substrate except the area defining said buried contact, forming in said substrate a zone of a second conductivity type at the area defining the buried contact by implanting impurity ions, removing the silicon oxide layer over said area defining said buried contact, removing the first mask over said first portion of said polysilicon layer, depositing sequentially a conducting layer and a second polysilicon layer, anisotropically etching said second polysilicon layer over an area defining a transistor gate electrode and interconnect by using a second mask and a second etching gas having an etch rate for polysilicon and low etch rate for the conducting layer, anisotropically etching said conducting layer over said area defining said transistor gate electrode and interconnect by a third etching gas having an etch rate for said conducting layer and an etch rate for said polysilicon and silicon lower than the etch rate for said conducting layer, and removing residual polysilicon in the transistor gate electrode and interconnect by a process including heating to a temperature of not less than 800° C.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1999-08-27 | 2000-02-26 | 2000-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-08-27 | 2004-02-26 | 2004-08-27 | $3760.00 | Window Closed / Lapsed |
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