Ultra-low power, scan on demand keypad encoder

Claim 2

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: an encoder circuit, coupled to said rows of said keypad, that activates a keydown signal whenever any switch in any of said keypad columns is closed and deactivates said keydown signal when none of said switches in any of said keypad columns is closed; a resettable logic circuit that generates a control signal, said control signal having first and second states, said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a scanning circuit, coupled to said columns of said keypad, that asserts a scanning signal on said columns of said keypad in a predefined sequence only when said control signal is in said first state, said scanning circuit coupled to each of said columns by a column driver so that said column drivers are active as long as said control signal is not in said first state, said column drivers when active maintaining said columns at a low voltage level so as to minimize energy usage by said column driver and to minimize energy usage by said keypad encoder when said control signal is not in said first state; said encoder circuit including circuitry that generates a key identification signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal; and an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; said scanning circuit including logic for stopping said scanning circuit whenever said keydown signal is activated so as to stop said scanning circuit while it is still generating the scanning signal corresponding to the column having said closed switch; said scanning circuit resuming scanning said columns of said keypad when said closed switch is released and said second switch in said second column was pressed before said closed switch from said first column different from said second column has been released; wherein when any first key is pressed and then any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to said second key is released; said scanning circuit stops scanning while generating the scanning signal corresponding to said first column, resumes scanning after said first key is released and then stops scanning a second time while generating the scanning signal corresponding to said second column, and said encoder circuit generates two successive key identification signals identifying said first key and then said second key.

Claim 3

The keypad encoder of claim 1, including a debounce circuit that low pass filters and integrates said keydown signal to generate a debounce signal that is delayed with respect to said keydown signal; said debounce circuit activating and deactivating said debounce signal at circuitry determined delays after said keydown signal is activated and deactivated, respectively; said scanning circuit including a counter that generates count signals in a sequence corresponding to said predefined sequence; said resettable logic circuit including logic for setting said control signal to said second state when said debounce signal is deactivated and said counter generates count signals having a predefined count value.

Claim 4

The keypad encoder of claim 2 including an early DA off circuit buffer that activates a data available signal when said signals identifying said closed switch are ready to be read by an external device, said DA off circuit buffer deactivating said data available signal before said debounce signal is deactivated and after the later event of said keydown signal being deactivated, indicating said key has been released, and an output enable signal being asserted by an external device, indicating said signals identifying said closed switch have been read by said external device.

Claim 5

The keypad encoder of claim 1, including an oscillator that generates a clock signal, said oscillator including gate circuitry that disables said oscillator from generating said clock signal while said control signal is in said second state.

Claim 6

The keypad encoder of claim 1 wherein said column driver is a two input NOR gate with an open-drain configuration, a first of said inputs being an inverted version of said control signal and a second of said inputs being an inverted version of said scanning signal.

Claim 7

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: a scanning circuit, coupled to said columns of said keypad by a plurality of column drivers, each said column driver corresponding to one of said columns, that asserts a scanning signal on said columns of said keypad in a predefined sequence when said scanning circuit is operated in a first mode and that asserts said scanning signal on all of said columns of said keypad simultaneously when said scanning circuit is operated in a second mode, said column drivers minimizing energy consumption of said keypad encoder when said scanning circuit is operated in said second mode; an encoder circuit, coupled to said rows of said keypad, that generates a first signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal, and that activates a keydown signal whenever any switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed and deactivates said keydown signal when none of said switches in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed; an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; and a resettable logic circuit that generates a control signal, said control signal having first and second states, said control signal putting said scanning circuit in said first mode when said control signal is in said first state and putting said scanning circuit in said second mode when said control signal is in said second state; said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit thereby minimizing energy consumption of said keypad when said keypad is waiting for said keydown signal to be activated by said encoder circuit; said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; wherein said keypad encoder generates two successive key identification signals at non-overlapping times when any first key is pressed and then any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to when said second key is released, said encoder circuit generating a first key identification signal identifying said first key while said first key remains pressed and generating a second key identification signal identifying said second key only after said first key is released.

Claim 8

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: a scanning circuit, coupled to said columns of said keypad by a plurality of column drivers, each said column driver corresponding to one of said columns, that asserts a scanning signal on said columns of said keypad in a predefined sequence when said scanning circuit is operated in a first mode and that asserts said scanning signal on all of said columns of said keypad simultaneously when said scanning circuit is operated in a second mode, said column drivers minimizing energy consumption of said keypad encoder when said scanning circuit is operated in said second mode; an encoder circuit, coupled to said rows of said keypad, that generates a first signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal, and that activates a keydown signal whenever any switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed and deactivates said keydown signal when none of said switches in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed; an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; and a resettable logic circuit that generates a control signal, said control signal having first and second states, said control signal putting said scanning circuit in said first mode when said control signal is in said first state and putting said scanning circuit in said second mode when said control signal is in said second state; said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit thereby minimizing energy consumption of said keypad when said keypad is waiting for said keydown signal to be activated by said encoder circuit; said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; wherein said keypad encoder generates two successive key identification signals at non-overlapping times when any first key is pressed and then any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to when said second key is released, said encoder circuit generating a first key identification signal identifying said first key while said first key remains pressed and generating a second key identification signal identifying said second key only after said first key is released.

Claim 9

The keypad encoder of claim 6, including a debounce circuit that low pass filters said keydown signal to generate a debounce signal that is delayed with respect to said keydown signal; said debounce circuit activating and deactivating said debounce signal at circuitry determined delays after said keydown signal is activated and deactivated, respectively; said scanning circuit including a counter that generates count signals in a sequence corresponding to said predefined sequence; said resettable logic circuit including logic for setting said control signal to said second state when said debounce signal is deactivated and said counter generates count signals having a predefined count value.

Claim 10

The keypad encoder of claim 7, including an oscillator that generates a clock signal, said oscillator including gate circuitry that disables said oscillator from generating said clock signal while said control signal is in said second state.

Claim 11

The keypad encoder of claim 7 including an early DA off circuit buffer that activates a data available signal when said signals identifying said closed switch are ready to be read by an external device, said DA off circuit buffer deactivating said data available signal before said debounce signal is deactivated and after the later event of said keydown signal being deactivated, indicating said key has been released, and an output enable signal being asserted by an external device, indicating said signals identifying said closed switch have been read by said external device.

Claim 12

The keypad encoder of claim 6, including an oscillator that generates a clock signal, said oscillator including gate circuitry that disables said oscillator from generating said clock signal while said control signal is in said second state.

Claim 13

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that coupled one of said columns to one of said rows; said keypad encoder comprising: an oscillator that generates a clock signal; a scanning circuit that scans said columns of said keypad, said scanning circuit including a counter circuit driver that generates a sequence of column selection signals, said counter circuit coupled to said oscillator so as to generate a new column selection signal in synchronization with said clock signal; and a driver circuit that activates a selected one of said columns of switches in said keypad in accordance with said column selection signal; an encoder circuit, coupled to said rows of said keypad, that generates a first signal identifying which of said rows, if any, has a closed switch in an activated column, and that activates a keydown signal whenever any switch in any activated column is closed; said counter circuit including a logic gate for stopping said counter circuit whenever said keydown signal is activated so as to stop said counter circuit While it is still generating the column selection signal corresponding to the column having said closed switch; a debounce circuit that activates a debounce signal after said keydown signal has been activated for a debounce delay period and for deactivating said debounce signal after said keydown signal is deactivated; an output circuit that stores and outputs signals identifying said closed switch; and a resettable logic circuit that generates a control signal, said resettable logic circuit activating said control signal whenever said keydown signal is activated and for deactivating said control signal when said debounce signal is deactivated and said counter circuit generated a predefined one of said column selection signals, said resettable logic circuit activating said control signal when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; said oscillator including a subcircuit that receives said control signal and disables said oscillator whenever said control signal is deactivated so as to deactivate said scanning circuit; said scanning circuit including circuitry for simultaneously activating all of said columns via said driver circuit when said control signal is deactivated so that said encoder circuit will detect closure of any switch in said keypad and generate said keydown signal; and for activating only one of said columns at a time when said control signal is activated, said driver circuit having minimal energy consumption while activating all of said columns, said driver circuit thereby helping to minimize energy usage by said keypad encoder when said control signal is deactivated; said scanning circuit resuming scanning said columns of said keypad when said closed switch is released and said second switch in said second column was pressed before said closed switch from said first column different from said second column has been released; wherein when any first key is pressed and then any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to said second key is released; said scanning circuit stops scanning while generating the scanning signal corresponding to said first column, resumes scanning after said first key is released and then stops scanning a second time while generating the scanning signal corresponding to said second column, and said encoder circuit generates two successive key identification signals identifying said first key and then said second key.

Claim 14

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that coupled one of said columns to one of said rows; said keypad encoder comprising: an oscillator that generates a clock signal; a scanning circuit that scans said columns of said keypad, said scanning circuit including a counter circuit driver that generates a sequence of column selection signals, said counter circuit coupled to said oscillator so as to generate a new column selection signal in synchronization with said clock signal; and a driver circuit that activates a selected one of said columns of switches in said keypad in accordance with said column selection signal; an encoder circuit, coupled to said rows of said keypad, that generates a first signal identifying which of said rows, if any, has a closed switch in an activated column, and that activates a keydown signal whenever any switch in any activated column is closed; said counter circuit including a logic gate for stopping said counter circuit whenever said keydown signal is activated so as to stop said counter circuit While it is still generating the column selection signal corresponding to the column having said closed switch; a debounce circuit that activates a debounce signal after said keydown signal has been activated for a debounce delay period and for deactivating said debounce signal after said keydown signal is deactivated; an output circuit that stores and outputs signals identifying said closed switch; and a resettable logic circuit that generates a control signal, said resettable logic circuit activating said control signal whenever said keydown signal is activated and for deactivating said control signal when said debounce signal is deactivated and said counter circuit generated a predefined one of said column selection signals, said resettable logic circuit activating said control signal when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; said oscillator including a subcircuit that receives said control signal and disables said oscillator whenever said control signal is deactivated so as to deactivate said scanning circuit; said scanning circuit including circuitry for simultaneously activating all of said columns via said driver circuit when said control signal is deactivated so that said encoder circuit will detect closure of any switch in said keypad and generate said keydown signal; and for activating only one of said columns at a time when said control signal is activated, said driver circuit having minimal energy consumption while activating all of said columns, said driver circuit thereby helping to minimize energy usage by said keypad encoder when said control signal is deactivated; said scanning circuit resuming scanning said columns of said keypad when said closed switch is released and said second switch in said second column was pressed before said closed switch from said first column different from said second column has been released; wherein when any first key is pressed and then any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to said second key is released; said scanning circuit stops scanning while generating the scanning signal corresponding to said first column, resumes scanning after said first key is released and then stops scanning a second time while generating the scanning signal corresponding to said second column, and said encoder circuit generates two successive key identification signals identifying said first key and then said second key.

Claim 17

The method of claim 12, including low pass filtering and integrating said keydown signal to generate a debounce signal that is delayed with respect to said keydown signal, including activating and deactivating said debounce signal after said keydown signal is activated and deactivated, respectively; said scanning step including generating count signals in a sequence corresponding to said predefined sequence; said control signal generating step including setting said control signal to said second state when said debounce signal is deactivated and said count signals having a predefined count value.

Claim 18

The method of identifying pressed keys of claim 12, including: when said any first key is pressed and then said any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to when said second key is released: asserting said scanning signal on said columns in said predefined sequence a first time after said first key remains pressed and asserting said scanning signal on said columns in said predefined sequence a second time after said first key is released.

Claim 19

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: an encoder circuit, coupled to said rows of said keypad, that activates a keydown signal whenever any switch in any of said keypad columns is closed and deactivates said keydown signal when none of said switches in any of said keypad columns is closed; a resettable logic circuit that generates a control signal, said control signal having first and second states, said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a scanning circuit coupled to said columns of said keypad, that asserts a scanning signal on said columns of said keypad in a predefined sequence only when said control signal is in said first state, said scanning circuit coupled to each of said columns by a column driver so that said column drivers are active as long as said control signal is not in said first state, said column drivers when active maintaining said columns at a low voltage level so as to minimize energy usage by said column driver and to minimize energy usage by said keypad encoder when said control signal is not in said first state; said encoder circuit including circuitry that generates a key identification signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal; and an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; wherein said column driver is a two input NOR gate with an open-drain configuration, a first of said inputs being an inverted version of said control signal and a second of said inputs being an inverted version of said scanning signal.

Claim 20

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: an encoder circuit, coupled to said rows of said keypad, that activates a keydown signal whenever any switch in any of said keypad columns is closed and deactivates said keydown signal when none of said switches in any of said keypad columns is closed; a resettable logic circuit that generates a control signal, said control signal having first and second states, said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a scanning circuit coupled to said columns of said keypad, that asserts a scanning signal on said columns of said keypad in a predefined sequence only when said control signal is in said first state, said scanning circuit coupled to each of said columns by a column driver so that said column drivers are active as long as said control signal is not in said first state, said column drivers when active maintaining said columns at a low voltage level so as to minimize energy usage by said column driver and to minimize energy usage by said keypad encoder when said control signal is not in said first state; said encoder circuit including circuitry that generates a key identification signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal; and an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; wherein said column driver is a two input NOR gate with an open-drain configuration, a first of said inputs being an inverted version of said control signal and a second of said inputs being an inverted version of said scanning signal.

Claim 21

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: an encoder circuit, coupled to said rows of said keypad, that activates a keydown signal whenever any switch in any of said keypad columns is closed and deactivates said keydown signal when none of said switches in any of said keypad columns is closed; a resettable logic circuit that generates a control signal, said control signal having first and second states, said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a scanning circuit, coupled to said columns of said keypad, that asserts a scanning signal on said columns of said keypad in a predefined sequence only when said control signal is in said first state, said scanning circuit coupled to each of said columns by a column driver so that said column drivers are active as long as said control signal is not in said first state, said column drivers when active maintaining said columns at a low voltage level so as to minimize energy usage by said column driver and to minimize energy usage by said keypad encoder when said control signal is not in said first state; said encoder circuit including circuitry that generates a key identification signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal; an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; a debounce circuit that low pass filters and integrates said keydown signal to generate a debounce signal that is delayed with respect to said keydown signal; said debounce circuit activating and deactivating said debounce signal at circuitry determined delays after said keydown signal is activated and deactivated, respectively; said scanning circuit including a counter that generates count signals in a sequence corresponding to said predefined sequence; said resettable logic circuit including logic for setting said control signal to said second state when said debounce signal is deactivated and said counter generates count signals having a predefined count value; and an early DA off circuit buffer that activates a data available signal when said signals identifying said closed switch are ready to be read by an external device, said DA off circuit buffer deactivating said data available signal before said debounce signal is deactivated and after the later event of said keydown signal being deactivated, indicating said key has been released, and an output enable signal being asserted by an external device, indicating said signals identifying said closed switch have been read by said external device.

Claim 22

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: an encoder circuit, coupled to said rows of said keypad, that activates a keydown signal whenever any switch in any of said keypad columns is closed and deactivates said keydown signal when none of said switches in any of said keypad columns is closed; a resettable logic circuit that generates a control signal, said control signal having first and second states, said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a scanning circuit, coupled to said columns of said keypad, that asserts a scanning signal on said columns of said keypad in a predefined sequence only when said control signal is in said first state, said scanning circuit coupled to each of said columns by a column driver so that said column drivers are active as long as said control signal is not in said first state, said column drivers when active maintaining said columns at a low voltage level so as to minimize energy usage by said column driver and to minimize energy usage by said keypad encoder when said control signal is not in said first state; said encoder circuit including circuitry that generates a key identification signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal; an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; a debounce circuit that low pass filters and integrates said keydown signal to generate a debounce signal that is delayed with respect to said keydown signal; said debounce circuit activating and deactivating said debounce signal at circuitry determined delays after said keydown signal is activated and deactivated, respectively; said scanning circuit including a counter that generates count signals in a sequence corresponding to said predefined sequence; said resettable logic circuit including logic for setting said control signal to said second state when said debounce signal is deactivated and said counter generates count signals having a predefined count value; and an early DA off circuit buffer that activates a data available signal when said signals identifying said closed switch are ready to be read by an external device, said DA off circuit buffer deactivating said data available signal before said debounce signal is deactivated and after the later event of said keydown signal being deactivated, indicating said key has been released, and an output enable signal being asserted by an external device, indicating said signals identifying said closed switch have been read by said external device.

Claim 23

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: a scanning circuit, coupled to said columns of said keypad by a plurality of column drivers, each said column driver corresponding to one of said columns, that asserts a scanning signal on said columns of said keypad in a predefined sequence when said scanning circuit is operated in a first mode and that asserts said scanning signal on all of said columns of said keypad simultaneously when said scanning circuit is operated in a second mode, said column drivers minimizing energy consumption of said keypad encoder when said scanning circuit is operated in said second mode; an encoder circuit, coupled to said rows of said keypad, that generates a first signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal, and that activates a keydown signal whenever any switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed and deactivates said keydown signal when none of said switches in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed; an output circuit coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; a resettable logic circuit that generates a control signal, said control signal having first and second states, said control signal putting said scanning circuit in said first mode when said control signal is in said first state and putting said scanning circuit in said second mode when said control signal is in said second state; said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit thereby minimizing energy consumption of said keypad when said keypad is waiting for said keydown signal to be activated by said encoder circuit; said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a debounce circuit that low pass filters said keydown signal to generate a debounce signal that is delayed with respect to said keydown signal; said debounce circuit activating and deactivating said debounce signal at circuitry determined delays after said keydown signal is activated and deactivated, respectively; said scanning circuit including a counter that generates count signals in a sequence corresponding to said predefined sequence; said resettable logic circuit including logic for setting said control signal to said second state when said debounce signal is deactivated and said counter generates count signals having a predefined count value; and an early DA off circuit buffer that activates a data available signal when said signals identifying said closed switch are ready to be read by an external device, said DA off circuit buffer deactivating said data available signal before said debounce signal is deactivated and after the later event of said keydown signal being deactivated, indicating said key has been released, and an output enable signal being asserted by an external device, indicating said signals identifying said closed switch have been read by said external device.

Claim 24

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: a scanning circuit, coupled to said columns of said keypad by a plurality of column drivers, each said column driver corresponding to one of said columns, that asserts a scanning signal on said columns of said keypad in a predefined sequence when said scanning circuit is operated in a first mode and that asserts said scanning signal on all of said columns of said keypad simultaneously when said scanning circuit is operated in a second mode, said column drivers minimizing energy consumption of said keypad encoder when said scanning circuit is operated in said second mode; an encoder circuit, coupled to said rows of said keypad, that generates a first signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal, and that activates a keydown signal whenever any switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed and deactivates said keydown signal when none of said switches in any of said keypad columns on which said scanning circuit has asserted said scanning signal is closed; an output circuit coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; a resettable logic circuit that generates a control signal, said control signal having first and second states, said control signal putting said scanning circuit in said first mode when said control signal is in said first state and putting said scanning circuit in said second mode when said control signal is in said second state; said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit thereby minimizing energy consumption of said keypad when said keypad is waiting for said keydown signal to be activated by said encoder circuit; said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a debounce circuit that low pass filters said keydown signal to generate a debounce signal that is delayed with respect to said keydown signal; said debounce circuit activating and deactivating said debounce signal at circuitry determined delays after said keydown signal is activated and deactivated, respectively; said scanning circuit including a counter that generates count signals in a sequence corresponding to said predefined sequence; said resettable logic circuit including logic for setting said control signal to said second state when said debounce signal is deactivated and said counter generates count signals having a predefined count value; and an early DA off circuit buffer that activates a data available signal when said signals identifying said closed switch are ready to be read by an external device, said DA off circuit buffer deactivating said data available signal before said debounce signal is deactivated and after the later event of said keydown signal being deactivated, indicating said key has been released, and an output enable signal being asserted by an external device, indicating said signals identifying said closed switch have been read by said external device.

Claim 25

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: an encoder circuit, coupled to said rows of said keypad, that activates a keydown signal whenever any switch in any of said keypad columns is closed and deactivates said keydown signal when none of said switches in any of said keypad columns is closed; a resettable logic circuit that generates a control signal, said control signal having first and second states, said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a scanning circuit, coupled to said columns of said keypad, that asserts a scanning signal on said columns of said keypad in a predefined sequence only when said control signal is in said first state, said scanning circuit coupled to each of said columns by a column driver so that said column drivers are active as long as said control signal is not in said first state, said column drivers when active maintaining said columns at a low voltage level so as to minimize energy usage by said column driver and to minimize energy usage by said keypad encoder when said control signal is not in said first state; said encoder circuit including circuitry that generates a key identification signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal; and an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; said keypad encoder including logic for generating two successive key identification signals at non-overlapping times when any first key is pressed and then any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to when said second key is released, wherein said encoder circuit generates a first key identification signal identifying said first key while said first key remains pressed and generates a second key identification signal identifying said second key only after said first key is released.

Claim 26

A keypad encoder for use with a keypad having an array of keys coupled to switches arranged in columns and rows such that depressing any key on the keypad closes a corresponding switch that couples one of said columns to one of said rows; said keypad encoder comprising: an encoder circuit, coupled to said rows of said keypad, that activates a keydown signal whenever any switch in any of said keypad columns is closed and deactivates said keydown signal when none of said switches in any of said keypad columns is closed; a resettable logic circuit that generates a control signal, said control signal having first and second states, said resettable circuit putting said control signal in said first state whenever said keydown signal is activated by said encoder circuit, and setting said control signal in said second state after said keydown signal is deactivated by said encoder circuit, said resettable logic circuit putting said control signal in said first state when a second switch from a second column is pressed before said closed switch from a first column different from said second column has been released; a scanning circuit, coupled to said columns of said keypad, that asserts a scanning signal on said columns of said keypad in a predefined sequence only when said control signal is in said first state, said scanning circuit coupled to each of said columns by a column driver so that said column drivers are active as long as said control signal is not in said first state, said column drivers when active maintaining said columns at a low voltage level so as to minimize energy usage by said column driver and to minimize energy usage by said keypad encoder when said control signal is not in said first state; said encoder circuit including circuitry that generates a key identification signal identifying which of said rows, if any, has a closed switch in any of said keypad columns on which said scanning circuit has asserted said scanning signal; and an output circuit, coupled to said encoder circuit, that stores and outputs signals identifying said closed switch; said keypad encoder including logic for generating two successive key identification signals at non-overlapping times when any first key is pressed and then any second key in a different column from said first column is pressed before said first key is released, and then said first key is released prior to when said second key is released, wherein said encoder circuit generates a first key identification signal identifying said first key while said first key remains pressed and generates a second key identification signal identifying said second key only after said first key is released.