US5539246A — Microelectronic integrated circuit including hexa…

Claim 1

Independent Claim 97 words

A microelectronic device formed on a semiconductor substrate, the device having a periphery defined by a hexagon, said hexagon having first through sixth edges, the device comprising: an active area formed within said periphery; a central terminal formed in a central portion of said active area; a first terminal formed adjacent to said first edge in said active area; a first gate formed between said first terminal and said central terminal; a second terminal formed adjacent to said second edge in said active area; and a second gate formed between said second terminal and said central terminal.

Claim 2

Dependent Claim 97 words

A microelectronic device formed on a semiconductor substrate, the device having a periphery defined by a hexagon, said hexagon having first through sixth edges, the device comprising: an active area formed within said periphery; a central terminal formed in a central portion of said active area; a first terminal formed adjacent to said first edge in said active area; a first gate formed between said first terminal and said central terminal; a second terminal formed adjacent to said second edge in said active area; and a second gate formed between said second terminal and said central terminal.

Claim 3

Dependent Claim 21 words

A device as in claim 1, in which said first edge and said second edge are separated by said fourth edge.

Claim 4

Dependent Claim 34 words

A device as in claim 1, further comprising: a third terminal formed adjacent to said third edge in said active area; and a third gate formed between the third terminal and the central terminal.

Claim 5

Dependent Claim 48 words

A device as in claim 3, in which said first edge and said second edge are separated by said fourth edge, said second edge and said third edge are separated by said fifth edge, and said third edge and said first edge are separated by said sixth edge.

Claim 6

Dependent Claim 19 words

A device as in claim 4, further comprising an inactive area disposed between said active area and said periphery.

Claim 7

Dependent Claim 40 words

A device as in claim 5, further comprising first, second and third gate terminals that are formed in said inactive area adjacent to said fourth, fifth and sixth edges and are connected to the first, second and third gates respectively.

Claim 8

Dependent Claim 25 words

A device as in claim 6, in which: the central terminal constitutes a source terminal; and the first, second and third terminals constitute drain terminals.

Claim 9

Dependent Claim 83 words

A device as in claim 1, further comprising a pull-down resistor, in which: said active area is N-type; the central terminal constitutes a source terminal and is connected to a first potential through the pull-down resistor; the first and second terminals constitute drain terminals and are connected to a second potential which is more positive than said first potential; and the device provides an OR function with inputs applied to the first and second gates and an output taken from the central terminal.

Claim 10

Dependent Claim 85 words

A device as in claim 1, further comprising a pull-up resistor, in which: said active area is N-type; the central terminal constitutes a source terminal and is connected to a first potential; the first and second terminals constitute drain terminals and are connected to a second potential which is more positive than said first potential through the pull-up resistor; and the device provides an NOR function with inputs applied to the first and second gates and an output taken from the first and second terminals.

Claim 11

Dependent Claim 83 words

A device as in claim 1, further comprising a pull-up resistor, in which: said active area is P-type; the central terminal constitutes a source terminal and is connected to a first potential through the pull-up resistor; the first and second terminals constitute drain terminals and are connected to a second potential which is more negative than said first potential; and the device provides an AND function with inputs applied to the first and second gates and an output taken from the central terminal.

Claim 12

Dependent Claim 85 words

A device as in claim 1, further comprising a pull-down resistor, in which: said active area is P-type; the central terminal constitutes a source terminal and is connected to a first potential; the first and second terminals constitute drain terminals and are connected to a second potential which is more negative than said first potential through the pull-down resistor; and the device provides a NAND function with inputs applied to the first and second gates and an output taken from the first and second terminals.

Claim 13

Dependent Claim 40 words

A device as in claim 1, in which: the device is a Metal-Oxide-Semiconductor (MOS) device; the first and second gates each comprise: an insulating oxide layer formed over the substrate; and a conductive metal layer formed over the oxide layer.

Claim 14

Dependent Claim 37 words

A device as in claim 1, further comprising an inactive area disposed between said active area and said periphery, in which the first and second gates each have opposite end portions that extend into said inactive area.

Claim 15

Dependent Claim 118 words

A microelectronic integrated circuit, comprising: a semiconductor substrate; and a plurality of microelectronic devices formed on the substrate, each device having a..periphery defined by a hexagon, said hexagons each having first through sixth edges, each device comprising: an active area formed within said periphery; a central terminal formed in a central portion of said active area; a first terminal formed adjacent to said first edge in said active area; and a first gate formed between said first terminal and said central terminal; in which at least one of said devices further comprises: a second terminal formed adjacent to said second edge in said active area; and a second gate formed between said second terminal and said central terminal.

Claim 16

Dependent Claim 118 words

A microelectronic integrated circuit, comprising: a semiconductor substrate; and a plurality of microelectronic devices formed on the substrate, each device having a..periphery defined by a hexagon, said hexagons each having first through sixth edges, each device comprising: an active area formed within said periphery; a central terminal formed in a central portion of said active area; a first terminal formed adjacent to said first edge in said active area; and a first gate formed between said first terminal and said central terminal; in which at least one of said devices further comprises: a second terminal formed adjacent to said second edge in said active area; and a second gate formed between said second terminal and said central terminal.

Claim 17

Dependent Claim 22 words

An integrated circuit as in claim 14, in which said first edge and said second edge are separated by said fourth edge.

Claim 18

Dependent Claim 44 words

An integrated circuit as in claim 14, in which said at least one of said devices further comprises: a third terminal formed adjacent to said third edge in said active area; and a third gate formed between the third terminal and the central terminal.

Claim 19

Dependent Claim 49 words

An integrated circuit as in claim 16, in which said first edge and said second edge are separated by said fourth edge, said second edge and said third edge are separated by said fifth edge, and said third edge and said first edge are separated by said sixth edge.

Claim 20

Dependent Claim 29 words

An integrated circuit as in claim 17, in which said at least one of said devices further comprises an inactive area disposed between said active area and said periphery.

Claim 21

Dependent Claim 50 words

An integrated circuit as in claim 18, in which said at least one of said devices further comprises first, second and third gate terminals that are formed in said inactive area adjacent to said fourth, fifth and sixth edges and are connected to the first, second and third gates respectively.

Claim 22

Dependent Claim 26 words

An integrated circuit as in claim 19, in which: the central terminal constitutes a source terminal; and the first, second and third terminals constitute drain terminals.

Claim 23

Dependent Claim 100 words

An integrated circuit as in claim 14, in which said at least one of said devices further comprises a pull-down resistor, in which: said active area is N-type; the central terminal constitutes a source terminal and is connected to a first potential through the pull-down resistor; the first and second terminals constitute drain terminals and are connected to a second potential which is more positive than said first potential; and in which said at least one of said devices provides an OR function with inputs applied to the first and second gates and an output taken from the central terminal.

Claim 24

Dependent Claim 102 words

An integrated circuit as in claim 14, in which said at least one of said devices further comprises a pull-up resistor, in which: said active area is N-type; the central terminal constitutes a source terminal and is connected to a first potential; the first and second terminals constitute drain terminals and are connected to a second potential which is more positive than said first potential through the pull-up resistor; and in which said at least one of said devices provides an NOR function with inputs applied to the first and second gates and an output taken from the first and second terminals.

Claim 25

Dependent Claim 100 words

An integrated circuit as in claim 14, in which said at least one of said devices further comprises a pull-up resistor, in which: said active area is P-type; the central terminal constitutes a source terminal and is connected to a first potential through the pull-up resistor; the first and second terminals constitute drain terminals and are connected to a second potential which is more negative than said first potential; and in which said at least one of said devices provides an AND function with inputs applied to the first and second gates and an output taken from the central terminal.

Claim 26

Dependent Claim 102 words

An integrated circuit as in claim 14, in which said at least one of said devices further comprises a pull-down resistor, in which: said active area is P-type; the central terminal constitutes a source terminal and is connected to a first potential; the first and second terminals constitute drain terminals and are connected to a second potential which is more negative than said first potential through the pull-down resistor; and in which said at least one of said devices provides a NAND function with inputs applied to the first and second gates and an output taken from the first and second terminals.

Claim 27

Dependent Claim 47 words

An integrated circuit as in claim 14, in which: said at least one of said devices is a Metal-Oxide-Semiconductor (MOS) device; and the first and second gates each comprise: an insulating oxide layer formed over the substrate; and a conductive metal layer formed over the oxide layer.

Claim 28

Dependent Claim 135 words

A microelectronic integrated circuit, comprising: a semiconductor substrate; and a plurality of microelectronic devices formed on the substrate, each device having a periphery defined by a hexagon, said hexagons each having first through sixth edges, each device comprising: an active area formed within said periphery; a central terminal formed in a central portion of said active area; a first terminal formed adjacent to said first edge in said active area; and a first gate formed between said first terminal and said central terminal; in which the devices are closely packed on the substrate, the circuit further comprising: interconnect wiring for electrically interconnecting the central terminals, first terminals and gates of the devices in a predetermined manner, the wiring comprising electrical conductors that extend in three directions that are angularly displaced from each other by 60°.

Claim 29

Dependent Claim 135 words

A microelectronic integrated circuit, comprising: a semiconductor substrate; and a plurality of microelectronic devices formed on the substrate, each device having a periphery defined by a hexagon, said hexagons each having first through sixth edges, each device comprising: an active area formed within said periphery; a central terminal formed in a central portion of said active area; a first terminal formed adjacent to said first edge in said active area; and a first gate formed between said first terminal and said central terminal; in which the devices are closely packed on the substrate, the circuit further comprising: interconnect wiring for electrically interconnecting the central terminals, first terminals and gates of the devices in a predetermined manner, the wiring comprising electrical conductors that extend in three directions that are angularly displaced from each other by 60°.

Claim 30

Dependent Claim 141 words

An integrated circuit as in claim 26, in which each of said devices further comprises: a second terminal formed adjacent to said second edge in said active area; a second gate formed between said second terminal and said central terminal; a third terminal formed adjacent to said third edge in said active area; and a third gate formed between the third terminal and the central terminal, in which: said first edge and said second edge are separated by said fourth edge, said second edge and said third edge are separated by said fifth edge, and said third edge and said first edge are separated by said sixth edge; and said interconnect wiring further comprises electrical conductors for interconnecting the central terminals, first terminals, second terminals, third terminals, first gates, second gates and third gates of the devices in said predetermined manner.

Claim 31

Dependent Claim 42 words

An integrated circuit as in claim 14, in which each device further comprises an inactive area disposed between said active area and said periphery, in which the first and second gates each have opposite end portions that extend into said inactive area.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1999-07-23	2000-01-22	2000-07-23	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2003-07-23	2004-01-22	2004-07-23	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2007-07-23	2008-01-22	2008-07-23	$7700.00	Window Closed / Lapsed

Microelectronic integrated circuit including hexagonal semiconductor "gate " device

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