US5539229A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOSFET with raised STI isolation self-aligned to the gate stack
Assignee: International Business Machines Corp
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Filing: 1994-12-28
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Granted: 1996-07-23
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Expires: 2014-12-28
Abstract
Abstract A semiconductor structure comprising a transistor having a gate conductor that has first and second edges bounded by raised isolation structures (e.g. STI). A source diffusion is self-aligned to the third edge and a drain diffusion is self-aligned to the fourth edge of the gate electrode.
Inventors
- 👤 Wendell P. Noble, Jr
- 👤 Ashwin K. Ghatalia
- 👤 Badih El-Kareh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 18:08
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038; H10D; H10D48/00; H10D48/30; H10D48/32; H10D48/36; H10D84/00
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
97 words
A semiconductor structure, comprising a transistor having a gate, said gate comprising a thin dielectric and an individual segment of gate conductor, said gate conductor being substantially co-extensive with said thin dielectric, said gate conductor having a top surface having opposed first and second edges and opposed third and fourth edges; raised isolation bounding said first and second edges; a source self-aligned to said third edge and a drain self-aligned to said fourth edge, said raised isolation not bounding said third edge and said fourth edge; and a conductive wiring level in contact with said top surface.
Claim 2
Dependent Claim
97 words
A semiconductor structure, comprising a transistor having a gate, said gate comprising a thin dielectric and an individual segment of gate conductor, said gate conductor being substantially co-extensive with said thin dielectric, said gate conductor having a top surface having opposed first and second edges and opposed third and fourth edges; raised isolation bounding said first and second edges; a source self-aligned to said third edge and a drain self-aligned to said fourth edge, said raised isolation not bounding said third edge and said fourth edge; and a conductive wiring level in contact with said top surface.
Claim 3
Dependent Claim
21 words
A semiconductor structure, as recited in claim 1, wherein said thin dielectric has a uniform thickness extending to said raised isolation.
Claim 4
Dependent Claim
22 words
A semiconductor structure, as recited in claim 1, wherein said raised isolation comprises a raised Shallow trench for a shallow trench isolation.
Claim 5
Dependent Claim
21 words
A semiconductor structure, as recited in claim 1, wherein said raised isolation comprises a raised deep trench for a trench capacitor.
Claim 6
Dependent Claim
26 words
A semiconductor structure, as recited in claim 1, said source and drain located in single crystal silicon, said transistor further compensing a raised source and drain.
Claim 7
Dependent Claim
23 words
A semiconductor structure, as recited in claim 5, wherein said raised source and drain is comprises one of polysilicon and deposited amorphous silicon.
Claim 8
Dependent Claim
17 words
A semiconductor structure, as recited in claim 5, wherein said raised source and drain comprises selective silicon.
Claim 9
Dependent Claim
17 words
A semiconductor structure, as recited in claim 5, wherein said raised source and drain further comprises silicide.
Claim 10
Dependent Claim
30 words
A semiconductor structure, as recited in claim 8, wherein said raised source and drain have a junction depth in said single crystal substrate, said junction depth being about 500 A.
Claim 11
Dependent Claim
17 words
A semiconductor structure, as recited in claim 1, wherein said conductive wiring level comprises a conductive spacer.
Claim 12
Dependent Claim
23 words
A semiconductor structure, as recited in claim 1, wherein said conductive wiring level is aligned with said third edge and said fourth edge.
Claim 13
Dependent Claim
17 words
A semiconductor structure, as recited in claim 11, wherein said conductive wiring level comprises a metal silicide.
Claim 14
Dependent Claim
80 words
A semiconductor structure, comprising a transistor having a gate, said gate comprising a thin dielectric and an individual segment of gate conductor, said gate conductor being substantially co-extensive with said thin dielectric, said gate conductor having a top surface having opposed first and second edges, on isolation structures bounding said first and second edges, said isolation structures having substantially vertical sidewalls abutting said first and second edges, said dielectric having a substantially uniform thickness extending to said raised isolation structures.
Claim 15
Dependent Claim
80 words
A semiconductor structure, comprising a transistor having a gate, said gate comprising a thin dielectric and an individual segment of gate conductor, said gate conductor being substantially co-extensive with said thin dielectric, said gate conductor having a top surface having opposed first and second edges, on isolation structures bounding said first and second edges, said isolation structures having substantially vertical sidewalls abutting said first and second edges, said dielectric having a substantially uniform thickness extending to said raised isolation structures.
Claim 16
Dependent Claim
15 words
A semiconductor structure, as recited in claim 13, said isolation structures being raised trench isolation.
Claim 17
Dependent Claim
22 words
A semiconductor structure, as recited in claim 14, said raised trench isolation being one of deep trench isolation and shallow trench isolation.
Claim 18
Dependent Claim
45 words
A semiconductor structure, as recited in claim 13, said top surface further comprising opposed third and fourth edges, a some self-aligned to said third edge and a drain self-aligned to said fourth edge, said raised isolation not bounding said third edge and said fourth edge.
Claim 19
Dependent Claim
20 words
A semiconductor structure, as recited in claim 16, wherein said source and said drain comprise a raised source and drain.
Claim 20
Dependent Claim
22 words
A semiconductor structure, as recited in claim 17, said raised source and drain comprising one of polysilicon, amorphous silicon, and selective silicon.
Claim 21
Dependent Claim
29 words
A semiconductor structure, as recited in claim 17, said raised source and drain having a junction depth in said single crystal substrate, said junction depth being about 500 A.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-07-23 | 2000-01-22 | 2000-07-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-07-23 | 2004-01-22 | 2004-07-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-07-23 | 2008-01-22 | 2008-07-23 | $7700.00 | Window Closed / Lapsed |