Patent US5537059A successfully refreshed from Google Patents.
US5537059A
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Output circuit of semiconductor integrated circuit device
Assignee: Renesas Electronics Corp
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Filing: 1995-09-05
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Granted: 1996-07-16
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Expires: 2015-09-05
Abstract
Abstract An output circuit of a semiconductor integrated circuit device is obtained which can externally produce a signal lager in amplitude than an internal signal amplitude without degrading reliability of miniaturized transistors. A PMOS transistor (23) and an NMOS transistor (24) connected to an output terminal (5) cooperatively output a potential (V DD2 ) at a power source or a potential (V SS ) at a ground as output voltage. A potential of an input signal, a potential (V DD1 ) at a power source or the potential V SS at the ground, are converted by a first converting unit (K2) and a second converting unit (K3) to apply to a gate of the PMOS transistor (23). The first converting unit (k2) and the second converting unit (K3) utilize potential developed by an intermediate potential generating circuit and the potential (V DD1 ) at the power source to convert the potential of the input signal. Thus, an output signal having a larger amplitude than the input signal amplitude can be produced without applying the potential difference of the potential (V DD2 ) from the ground potential (V SS ) to insulated gate transistors (12 to 23) constituting the output circuit between their respective gates and substrate.
Inventors
- 👤 Katsushi Asahina
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 18:21
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/003; H03K19/00346; H03K19/00361; H03K19/00315
Claims Analysis
Total Claims: 33
Claim 1
Independent Claim
545 words
An output circuit of a semiconductor integrated circuit device, said output circuit including an input terminal for receiving an input signal which oscillates between a first potential and a second potential lower than said first potential and an output terminal for outputting an output signal which oscillates between a third potential and a fourth potential, wherein the third potential is higher than said first potential and said fourth potential is higher than or equal to said second potential, said output circuit comprising: a first insulated gate transistor of a first conductivity type having one current electrode for receiving said third potential, another current electrode connected to said output terminal of said output circuit, a control electrode, and a substrate potential which is equal to said third potential; an intermediate potential generating circuit; a first converting unit; and a second converting part, wherein said intermediate potential generating circuit generates a first intermediate potential which is between said first and second potentials, wherein said first converting unit includes: voltage drop means having one end for receiving said third potential and another end; a second insulated gate transistor of a second conductivity type having a control electrode for receiving a second intermediate potential which is equal to said first potential between said first intermediate potential and said third potential, one current electrode, and another current electrode which is connected to said another end of said voltage drop means; and a third insulated gate transistor of the first conductivity type having a control electrode for receiving said first intermediate potential, one current electrode which is connected to said one current electrode of said second insulated gate transistor, and another current electrode, said first converting unit receives said input signal, and changes a potential at said another current electrode of said third insulated gate transistor in accordance with said input signal so that a first signal is outputted from said another current electrode of said second insulated gate transistor, said first signal oscillating between a fifth potential close to said third potential and a sixth potential lower than said fifth potential generated in accordance with said input signal, and wherein said second converting unit includes: a fourth insulated gate transistor of the first conductivity type having one current electrode for receiving said third potential, a control electrode for receiving said first signal, and another current electrode for outputting a second signal to said control electrode of said first insulated gate transistor; a fifth insulated gate transistor of the second conductivity type having a control electrode for receiving said second intermediate potential, one current electrode connected to said another current electrode of said fourth insulated gate transistor, and another current electrode; and a sixth insulated gate transistor of the first conductivity type having a control electrode for receiving said first intermediate potential, one current electrode connected to said another current electrode of said fifth insulated gate transistor, and another current electrode, said second converting unit receives an inverse input signal having a logic value which is an inverse of a logic value of said input signal and changes a potential at said another current electrode of said sixth insulated gate transistor in accordance with said inverse input signal so that said second signal is outputted in response to said first signal.
Claim 2
Dependent Claim
545 words
An output circuit of a semiconductor integrated circuit device, said output circuit including an input terminal for receiving an input signal which oscillates between a first potential and a second potential lower than said first potential and an output terminal for outputting an output signal which oscillates between a third potential and a fourth potential, wherein the third potential is higher than said first potential and said fourth potential is higher than or equal to said second potential, said output circuit comprising: a first insulated gate transistor of a first conductivity type having one current electrode for receiving said third potential, another current electrode connected to said output terminal of said output circuit, a control electrode, and a substrate potential which is equal to said third potential; an intermediate potential generating circuit; a first converting unit; and a second converting part, wherein said intermediate potential generating circuit generates a first intermediate potential which is between said first and second potentials, wherein said first converting unit includes: voltage drop means having one end for receiving said third potential and another end; a second insulated gate transistor of a second conductivity type having a control electrode for receiving a second intermediate potential which is equal to said first potential between said first intermediate potential and said third potential, one current electrode, and another current electrode which is connected to said another end of said voltage drop means; and a third insulated gate transistor of the first conductivity type having a control electrode for receiving said first intermediate potential, one current electrode which is connected to said one current electrode of said second insulated gate transistor, and another current electrode, said first converting unit receives said input signal, and changes a potential at said another current electrode of said third insulated gate transistor in accordance with said input signal so that a first signal is outputted from said another current electrode of said second insulated gate transistor, said first signal oscillating between a fifth potential close to said third potential and a sixth potential lower than said fifth potential generated in accordance with said input signal, and wherein said second converting unit includes: a fourth insulated gate transistor of the first conductivity type having one current electrode for receiving said third potential, a control electrode for receiving said first signal, and another current electrode for outputting a second signal to said control electrode of said first insulated gate transistor; a fifth insulated gate transistor of the second conductivity type having a control electrode for receiving said second intermediate potential, one current electrode connected to said another current electrode of said fourth insulated gate transistor, and another current electrode; and a sixth insulated gate transistor of the first conductivity type having a control electrode for receiving said first intermediate potential, one current electrode connected to said another current electrode of said fifth insulated gate transistor, and another current electrode, said second converting unit receives an inverse input signal having a logic value which is an inverse of a logic value of said input signal and changes a potential at said another current electrode of said sixth insulated gate transistor in accordance with said inverse input signal so that said second signal is outputted in response to said first signal.
Claim 3
Dependent Claim
52 words
The output circuit of the semiconductor integrated circuit device according to claim 1, further comprising a seventh insulated gate transistor of the second conductivity type having one current electrode for receiving said second potential, another current electrode which is connected to said output terminal of said output circuit, and a control electrode.
Claim 4
Dependent Claim
97 words
The output circuit of the semiconductor integrated circuit device according to claim 2, further comprising a control circuit provided prior to said input signal potential converting circuit to receive said input signal and a control signal, and in accordance with said control signal said control circuit outputs said input signal to said first insulated gate transistor and said inverse input signal to said seventh insulated gate transistor, or changes and outputs said input signal and said inverse input signal regardless of said input signal so as to turn off both said first and seventh insulated gate transistors.
Claim 5
Dependent Claim
64 words
The output circuit of the semiconductor integrated circuit device according to either of claims 1 or 2, further comprising an eighth insulted gate transistor of the second conductivity type having one current electrode for receiving said second potential, another current electrode which is connected to said another current electrode of said third insulated gate transistor, and a control electrode for receiving said input signal.
Claim 6
Dependent Claim
65 words
The output circuit of the semiconductor integrated circuit device according to either of claims 1 or 2, further comprising a ninth insulated gate transistor of the second conductivity type having one current electrode for receiving said second potential, another current electrode which is connected to said another current electrode of said sixth insulated gate transistor, and a control electrode for receiving said inverse input signal.
Claim 7
Dependent Claim
179 words
The output circuit of the semiconductor integrated circuit device according to claim 5, wherein said control circuit includes: a first NAND circuit having a first input terminal receiving said input signal, a second input terminal receiving said control signal, and an output terminal for outputting said input signal as it is changed to said control electrode of said eighth insulated gate transistor; a first inverter gate circuit having an input terminal receiving said input signal, and an output terminal; a second NAND circuit having a first input terminal connected to said output terminal of said inverter gate circuit, a second input terminal receiving said control signal, and an output terminal; a second inverter gate circuit having an input terminal connected to said output terminal of said first NAND circuit, and an output terminal connected to said control electrode of said ninth insulated gate transistor; and a third inverter gate circuit having an input terminal connected to said output terminal of said second NAND circuit, and an output terminal connected to said control electrode of said seventh insulated gate transistor.
Claim 8
Dependent Claim
97 words
The output circuit of the semiconductor integrated circuit device according to claim 6, wherein said second converting unit includes a level shift circuit connected between said one current electrode of said fourth insulated gate transistor and said third potential for increasing a voltage drop between said Second potential and said one current electrode of said fourth insulted gate transistor when the potential difference between said control electrode of said fourth insulated gate transistor and said one current electrode of said fourth insulated gate transistor decreases to cause transition of said fourth insulated gate transistor into an OFF-state.
Claim 9
Dependent Claim
61 words
The output circuit of the semiconductor integrated circuit device according to claim 7, wherein said level shift includes a tenth insulated gate transistor of the first conductivity type having one current electrode connected to said third potential, another current-electrode connected to said one current electrode of said fourth insulated gate transistor, and a control electrode for receiving said second intermediate potential.
Claim 10
Dependent Claim
90 words
The output circuit of the semiconductor integrated circuit device according to claim 6, wherein said voltage dropping means includes a tenth insulted gate transistor of the first conductivity type having one current electrode connected to said third potential, another current electrode which is connected to said another current electrode of said second insulated gate transistor, and a control electrode which is connected to said another-current electrode of said second insulted gate transistor, and wherein said fourth insulated gate transistor has a higher threshold voltage than said tenth insulted gate transistor.
Claim 11
Dependent Claim
73 words
The output circuit of the semiconductor integrated circuit device according to claim 6, wherein said second converting unit further includes resistance means which is inserted between said another current electrode of said sixth insulated gate transistor, said resistance means having one end which is connected to said another current electrode of said sixth insulated gate transistor, and another end which is connected to said another current electrode of said ninth insulated gate transistor.
Claim 12
Dependent Claim
80 words
The output circuit of the semiconductor integrated circuit device according to claim 10, wherein said resistance means includes an eleventh insulated gate transistor of the second conductivity type having one current electrode which is connected to said another current electrode of said eighth insulated gate transistor, another current electrode which is connected to said another current electrode of said ninth insulated gate transistor, and a control electrode which is connected to said control electrode of said ninth insulated gate transistor.
Claim 13
Dependent Claim
174 words
The output circuit device of the semiconductor integrated circuit device according to claim 6, wherein said intermediate potential generating circuit includes: a twelfth insulated gate transistor of the first conductivity type having one current electrode for receiving said first potential, a control electrode for receiving said second potential, and another current electrode, a thirteenth insulated gate transistor of the second conductivity type having one current electrode which is connected to said another current electrode of said twelfth insulated gate transistor, a control electrode which is connected to said another current electrode of said twelfth insulated gate transistor, and another current electrode, said thirteenth insulated gate transistor outputting a potential at its one current electrode as said first intermediate potential; and a fourteenth insulated gate transistor of the second conductivity type having one current electrode which is connected to said another current electrode of said thirteenth insulated gate transistor, a control electrode which is connected to said another current electrode of said thirteenth insulated gate transistor, and another current electrode for receiving said second potential.
Claim 14
Dependent Claim
103 words
The output circuit of the semiconductor integrated circuit device according to claim 1, wherein said second converting unit further includes a level shift circuit which is disposed between said one current electrode of said fourth insulated gate transistor and said third potential, said level shift circuit increasing a voltage drop between said second potential and said one current electrode of said fourth insulated gate transistor when the potential difference between said control electrode of said fourth insulated gate transistor and said one current electrode of said fourth insulated gate transistor decreases to cause transition of said fourth insulated gate transistor into an OFF-state.
Claim 15
Dependent Claim
65 words
The output circuit of the semiconductor integrated circuit device according to claim 13, wherein said level shift circuit includes a tenth insulated gate transistor of the first conductivity type having one current electrode for receiving said third potential, another current electrode which is connected to said one current electrode of said fourth insulated gate transistor, and a control electrode for receiving said second intermediate potential.
Claim 16
Dependent Claim
91 words
The output circuit of the semiconductor insulated gate transistor according to claim 1, wherein said voltage dropping means includes a tenth insulated gate transistor of the first conductivity type having one current electrode for receiving said third potential, another current electrode which is connected to said another current electrode of said second insulated gate transistor, and a control electrode which is connected to said another current electrode of said second insulated gate transistor, and wherein said fourth insulated gate transistor has a higher threshold voltage than said tenth insulated gate transistor.
Claim 17
Dependent Claim
66 words
The output circuit of the semiconductor insulated gate transistor according to claim 1, wherein said second converting unit further includes a ninth insulated gate transistor of the second conductivity type having one current electrode for receiving said second potential, another current electrode which is connected to said another current electrode of said sixth insulated gate transistor, and a control electrode for receiving said inverse input signal.
Claim 18
Dependent Claim
84 words
The output circuit of the semiconductor integrated circuit device according to claim 16, wherein said second converting unit further includes resistance means which is inserted between said another current electrode of said sixth insulated gate transistor and said another current electrode of said ninth insulated gate transistor, said resistance means having one end which is connected to said another current electrode of said sixth insulated gate transistor, and another end which is connected to said another current electrode of said ninth insulated gate transistor.
Claim 19
Dependent Claim
80 words
The output circuit of the semiconductor integrated circuit device according to claim 17, wherein said resistance means includes an eleventh insulated gate transistor of the second conductivity type having one current electrode which is connected to said another current electrode of said ninth insulated gate transistor, another current electrode which is connected to said another current electrode of said sixth insulated gate transistor, and a control electrode which is connected to said control electrode of said ninth insulated gate transistor.
Claim 20
Dependent Claim
179 words
The output circuit of the semiconductor integrated circuit device according to claim 1, wherein said intermediate potential generating circuit includes: a twelfth insulated gate transistor of the first conductivity type having one current electrode for receiving said first potential, a control electrode for receiving said second potential, and another current electrode; a thirteenth insulated gate transistor of the second conductivity type having one current electrode which is connected to said another current electrode of said twelfth insulate gate transistor, a control electrode which is connected to said another current electrode of said twelfth insulated gate transistor, and another current electrode, said thirteenth insulated gate transistor outputting a potential at said one current electrode of said thirteenth insulated gate transistor as said first intermediate potential; and a fourteenth insulated gate transistor of the second conductivity type having one current electrode which is connected to said another current electrode of said thirteenth insulated gate transistor, a control electrode which is connected to said another current electrode of said thirteenth insulated gate transistor, and another current electrode for receiving said second potential.
Claim 21
Dependent Claim
63 words
The output circuit of the semiconductor integrated circuit device according to claim 1, wherein said first converting unit further includes current limit means serially interposed in a current path which includes said second and said third insulated gate transistors, said current limit means limiting a current in said current path in accordance with a condition of said first or said second converting unit.
Claim 22
Dependent Claim
98 words
The output circuit of the semiconductor integrated circuit device according to claim 20, wherein said current limit means includes a seventh insulated gate transistor of the first conductivity type which is inserted between said second and said third insulated gate transistors, said seventh insulated gate transistor having a control electrode for receiving said second signal which is outputted by said second converting unit, one current electrode which is connected to said one current electrode of said second insulated gate transistor, and another current electrode which is connected to said one current electrode of said third insulated gate transistor.
Claim 23
Dependent Claim
69 words
The output circuit of the semiconductor integrated circuit device according to claim 20, wherein said voltage drop means and said current limit means include a fifteenth insulated gate transistor of the first conductivity type having one current electrode for receiving said third potential, another current electrode which is connected to said another current electrode of said second insulated gate transistor, and a control electrode for receiving said second signal.
Claim 24
Dependent Claim
78 words
The output circuit of the semiconductor integrated circuit device according to claim 20, wherein said second potential is supplied to said control electrode of said second insulated gate transistor when a value of said input signal is equal to said second potential, and a potential which turns off said second insulated gate transistor is supplied to said control electrode of said second insulated gate transistor when a value of said input signal is equal to said first potential.
Claim 25
Dependent Claim
29 words
The output circuit of the semiconductor integrated circuit device according to claim 23, wherein said inverse signal is supplied to said control electrode of said second insulated gate transistor.
Claim 26
Dependent Claim
139 words
The output circuit of the semiconductor integrated circuit device according to claim 23, wherein said first converting unit further includes: a sixteenth insulated gate transistor of the second conductivity type having a control electrode which is connected to said another current electrode of said sixth insulated gate transistor, one current electrode for receiving said second potential, and another current electrode; and a seventeenth insulated gate transistor of the first conductivity type having one current electrode for receiving said first potential, another current electrode which is connected to said another current electrode of said sixteenth insulated gate transistor, and a control electrode which is connected to said another current electrode of said seventh insulated gate transistor, and wherein said current electrode of said second insulated gate transistor is connected to said another current electrode of said eighth insulated gate transistor.
Claim 27
Dependent Claim
63 words
The output circuit of the semiconductor integrated circuit device according to claim 1, wherein said first converting unit further includes current limit means serially interposed in a current path which includes said second and said third insulated gate transistors, said current limit means limiting a current in said current path in accordance with a condition of said first or said second converting unit.
Claim 28
Dependent Claim
63 words
The output circuit of the semiconductor integrated circuit device according to claim 26, wherein said current limit means includes an eighteenth insulated gate transistor of the second conductivity type which is connected in parallel to said second insulated gate transistor, said eighteenth insulated gate transistor having a control electrode which is connected to said another current electrode of said sixth insulated gate transistor.
Claim 29
Dependent Claim
55 words
The output circuit of the semiconductor integrated circuit device according to claim 26, wherein said current limit means includes a nineteenth insulated gate transistor of the second conductivity type which is connected in parallel to said second insulated gate transistor, said nineteenth insulated gate transistor having a control electrode for receiving said inverse input signal.
Claim 30
Dependent Claim
22 words
The output circuit of the semiconductor integrated circuit device according to claim 1, wherein said second intermediate potential includes said first potential.
Claim 31
Dependent Claim
67 words
The output circuit of the semiconductor integrated circuit device according to claim 29, wherein said first converting unit further includes an eighth insulated gate transistor of the second conductivity type having one current electrode for receiving for receiving said second potential, another current electrode which is connected to said another current electrode of said third insulated gate transistor, and a control electrode for receiving said input signal.
Claim 32
Dependent Claim
66 words
The output circuit of the semiconductor integrated circuit device according to claim 29, wherein said second converting unit further includes a ninth insulated gate transistor of the second conductivity type having one current electrode for receiving said second potential, another current electrode which is connected to said another current electrode of said sixth insulated gate transistor, and a control electrode for receiving said inverse input signal.
Claim 33
Dependent Claim
53 words
The output circuit of the semiconductor integrated circuit device according to claim 29, further including a seventh insulated gate transistor of the second conductivity type having one current electrode for receiving said second potential, another current electrode which is connected to said output terminal and a control electrode for receiving said input signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-07-16 | 2000-01-15 | 2000-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-07-16 | 2004-01-15 | 2004-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-07-16 | 2008-01-15 | 2008-07-16 | $7700.00 | Window Closed / Lapsed |