Patent US5534784A successfully refreshed from Google Patents.
US5534784A
Expired / Lapsed
US
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Method for probing a semiconductor wafer
Assignee: NXP USA Inc
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Filing: 1994-05-02
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Granted: 1996-07-09
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Expires: 2014-05-02
Abstract
Abstract A method for probing a semiconductor wafer utilizes an array probe assembly (60) which includes a production package substrate (64). Substrate (64) is used to transform a configuration of conductive pads (74) on a probe card (62) into a configuration which matches that of conductive bumps (54) on a semiconductor die (52). Array probe assembly (60) may also include an array probe head (68) having probe wires (84) for coupling conductive pads (80) on substrate (64) with conductive bumps (54) on die (52). After probing the die, the die are assembled into a final packaged semiconductor device (110) which includes a substrate (90) which is nearly identical to the substrate used in the array probe assembly. Use of a production package substrate in the array probe assembly reduces the cost of the array probe assembly, and results in more accurate testing since the substrate in the array probe assembly will emulate the performance of the die in the final packaged device.
Inventors
- 👤 Thomas F. Lum
- 👤 James F. Wenzel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:55
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/06; G01R1/067; G01R1/073; G01R1/07307; G01R1/07364; G01R1/07378; H; H10; H10P; H10P95/00; H10W; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/654; H10W70/655; H10W74/00; H10W74/10; H10W74/15; H10W90/00; H10W90/701; H10W90/721; H10W90/724
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
166 words
A method for probing wafers comprising the steps of: providing a semiconductor wafer having a plurality of semiconductor die formed thereon, each die having a plurality of conductive bumps arranged in a first array; providing a probe card having a plurality of conductive pads arranged in a second array different from the first array; providing a first production package substrate having a first side which has a plurality of conductive pads arranged in the first array and an opposing second side which has a plurality of conductive pads arranged in the second array, wherein the plurality of conductive pads of the second side of the substrate are electrically connected to the plurality of conductive pads on the probe card; and probing a first die of the plurality of semiconductor die by electrically connecting the plurality of conductive pads on the first side of the first production package substrate with the plurality of conductive bumps on the first die and performing electrical tests on the first die.
Claim 2
Independent Claim
166 words
A method for probing wafers comprising the steps of: providing a semiconductor wafer having a plurality of semiconductor die formed thereon, each die having a plurality of conductive bumps arranged in a first array; providing a probe card having a plurality of conductive pads arranged in a second array different from the first array; providing a first production package substrate having a first side which has a plurality of conductive pads arranged in the first array and an opposing second side which has a plurality of conductive pads arranged in the second array, wherein the plurality of conductive pads of the second side of the substrate are electrically connected to the plurality of conductive pads on the probe card; and probing a first die of the plurality of semiconductor die by electrically connecting the plurality of conductive pads on the first side of the first production package substrate with the plurality of conductive bumps on the first die and performing electrical tests on the first die.
Claim 3
Dependent Claim
81 words
The method of claim 1 further comprising the steps of: providing a second production package substrate substantially identical to the first production package substrate, the second production package substrate having a first side which has a plurality of conductive pads arranged in the first array and an opposing second side which has a plurality of conductive pads arranged in the second array; separating the first die from the semiconductor wafer; and packaging the first die using the second production package substrate.
Claim 4
Dependent Claim
58 words
The method of claim 2 wherein the step of packaging comprises the step of: mounting the first die to the first side of the second production package substrate such that the plurality of conductive bumps of the first die is electrically connected to the plurality of conductive pads on the first side of the second production package substrate.
Claim 5
Dependent Claim
36 words
The method of claim 3 wherein the step of packaging further comprises the step of: encapsulating the first die and portions of the first side of the second production package substrate to protect from environmental influences.
Claim 6
Dependent Claim
37 words
The method of claim 3 wherein the step of packaging further comprises the step of: attaching a plurality of conductive balls to the plurality of conductive pads on the second side of the second production package substrate.
Claim 7
Dependent Claim
22 words
The method of claim 2 wherein the first production package substrate and the second production package substrate each comprise a ceramic substrate.
Claim 8
Independent Claim
227 words
A method for probing wafers comprising the steps of: providing a probe assembly for use in a tester, the probe assembly comprising: a probe card having a plurality of conductive traces which electrically terminate in a first array configuration; a first production package substrate having first and second opposing sides, wherein the first side has a first plurality of conductive pads arranged in the first array configuration, wherein the second side has a second plurality of conductive pads electrically connected to the first plurality of conductive pads and arranged in a second array configuration which is smaller in area than the first array configuration, and wherein the first plurality of conductive pads of the substrate is electrically connected to the plurality of conductive traces of the probe card; a probe needle assembly having a plurality of probe needles arranged in the second array configuration and electrically connected to the second plurality of pads on the second side of the substrate; providing a semiconductor wafer having a plurality of semiconductor die, each die having a plurality of die pads arranged in the second array configuration; probing a first semiconductor die of the plurality of semiconductor die by bringing the plurality of die pads of the first die into electrical contact with the plurality of probe needles and using the tester to perform electrical diagnostics on the first die.
Claim 9
Independent Claim
227 words
A method for probing wafers comprising the steps of: providing a probe assembly for use in a tester, the probe assembly comprising: a probe card having a plurality of conductive traces which electrically terminate in a first array configuration; a first production package substrate having first and second opposing sides, wherein the first side has a first plurality of conductive pads arranged in the first array configuration, wherein the second side has a second plurality of conductive pads electrically connected to the first plurality of conductive pads and arranged in a second array configuration which is smaller in area than the first array configuration, and wherein the first plurality of conductive pads of the substrate is electrically connected to the plurality of conductive traces of the probe card; a probe needle assembly having a plurality of probe needles arranged in the second array configuration and electrically connected to the second plurality of pads on the second side of the substrate; providing a semiconductor wafer having a plurality of semiconductor die, each die having a plurality of die pads arranged in the second array configuration; probing a first semiconductor die of the plurality of semiconductor die by bringing the plurality of die pads of the first die into electrical contact with the plurality of probe needles and using the tester to perform electrical diagnostics on the first die.
Claim 10
Dependent Claim
136 words
The method of claim 7 further comprising the steps of: singulating the first die from the wafer; providing a second production package substrate which is substantially identical to the first production package substrate, the second production package substrate having first and second opposing sides, wherein the first side has a first plurality of conductive pads arranged in the first array configuration, wherein the second side has a second plurality of conductive pads electrically connected to the first plurality of pads and arranged in a second array configuration which is smaller in area than the first array configuration; mounting the first die on the second side of the second production package substrate; and electrically connecting the plurality of die pads of the first die and the second plurality of conductive pads of the second production package substrate.
Claim 11
Dependent Claim
34 words
The method of claim 8 further comprising the step of encapsulating the first die and portions of the second surface of the second production package substrate to protect the first die from environmental influences.
Claim 12
Dependent Claim
29 words
The method of claim 8 further comprising the step of attaching a plurality of conductive balls to the first plurality of conductive pads of the second production package substrate.
Claim 13
Dependent Claim
32 words
The method of claim 7 wherein the step of providing a semiconductor wafer comprises providing a semiconductor wafer having a plurality of die pads, wherein each die pad comprises a conductive bump.
Claim 14
Dependent Claim
47 words
The method of claim 7 wherein the step of providing a probe assembly comprises providing a probe assembly having a probe needle assembly having a plurality of probe needles, wherein the plurality of probe needles comprises a plurality of probe wires arranged in the second array configuration.
Claim 15
Independent Claim
225 words
A method for probing wafers comprising the steps of: providing a semiconductor wafer having a plurality of semiconductor die formed thereon, wherein each semiconductor die has a plurality of die pads arranged in a first configuration; providing a probe card assembly for use in a tester, the probe card assembly comprising: a probe card having a plurality of conductive traces configured for suitable electrical connection to the tester, and having a plurality of conductive pads arranged in a second configuration, different from the first configuration, and electrically coupled to the plurality of conductive traces; a first production package substrate having a first surface with a plurality conductive pads arranged in the second configuration and electrically connected to the plurality of conductive pads on the probe card, and having a second surface opposite the first surface, the second surface having a plurality of conductive pads arranged in the first configuration; and means for electrically connecting the plurality of conductive pads on the second surface of the first production package substrate with the plurality of conductive pads on a first die of the plurality of die; bringing the semiconductor wafer in proximity to the probe card assembly such that electrical connections are made between the plurality of conductive pads on the first die and the conductive traces on the probe card; and electrically testing the first die.
Claim 16
Independent Claim
225 words
A method for probing wafers comprising the steps of: providing a semiconductor wafer having a plurality of semiconductor die formed thereon, wherein each semiconductor die has a plurality of die pads arranged in a first configuration; providing a probe card assembly for use in a tester, the probe card assembly comprising: a probe card having a plurality of conductive traces configured for suitable electrical connection to the tester, and having a plurality of conductive pads arranged in a second configuration, different from the first configuration, and electrically coupled to the plurality of conductive traces; a first production package substrate having a first surface with a plurality conductive pads arranged in the second configuration and electrically connected to the plurality of conductive pads on the probe card, and having a second surface opposite the first surface, the second surface having a plurality of conductive pads arranged in the first configuration; and means for electrically connecting the plurality of conductive pads on the second surface of the first production package substrate with the plurality of conductive pads on a first die of the plurality of die; bringing the semiconductor wafer in proximity to the probe card assembly such that electrical connections are made between the plurality of conductive pads on the first die and the conductive traces on the probe card; and electrically testing the first die.
Claim 17
Dependent Claim
32 words
The method of claim 13 wherein the step of providing a semiconductor wafer comprises providing a semiconductor wafer having a plurality of die pads, wherein each die pad comprises a conductive bump.
Claim 18
Dependent Claim
30 words
The method of claim 13 wherein the step of providing a probe card assembly comprises providing a probe card assembly wherein the first production package substrate is a ceramic substrate.
Claim 19
Dependent Claim
40 words
The method of claim 13 wherein the step of providing a probe card assembly comprises providing a probe card assembly wherein the means comprises a probe needle assembly having a plurality of probe wires substantially fixed in the first configuration.
Claim 20
Dependent Claim
64 words
The method of claim 13 further comprising the steps of: singulating the first die from the wafer; providing a second production package substantially identical to the first production package substrate; the second production package having first and second surfaces; mounting the first die on the second surface of the production package substrate; and electrically connecting the first die to the second production package substrate.
Claim 21
Dependent Claim
27 words
The method of claim 17 further comprising the step of attaching a plurality of conductive user terminals to the first surface of the second production package substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-07-09 | 2000-01-08 | 2000-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-07-09 | 2004-01-08 | 2004-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-07-09 | 2008-01-08 | 2008-07-09 | $7700.00 | Window Closed / Lapsed |