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US5533053A Expired / Lapsed US ⏱️ 0.0 years remaining

Low frequency common mode rejection in a clock circuit

Assignee: Maxim Integrated Products Inc
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Filing: 1994-05-16
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Granted: 1996-07-02
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Expires: 2014-05-16
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Abstract

Abstract A method and apparatus for passing a high frequency signal across an isolation barrier while rejecting low frequency common mode interference is provided. A high frequency signal is coupled across an isolation barrier. A circuit comprising an element having an impedance that is a function of frequency rejects low frequency common mode interference. The high frequency signal is provided as an output. The present invention is useful, for example, for isolating telephone apparatus, such as a telephone modem, from a telephone line.

Inventors

  • 👤 Russell A. Hershbarger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 18:30
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/0264; H04L25/0266; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0685; H04L7/00; H04L7/0079; H04L7/0083

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 194 words
Apparatus comprising: a driver for providing a signal; a capacitor having a first terminal and a second terminal, said first terminal coupled to said driver, said capacitor for coupling said signal from said first terminal to said second terminal; an impedance element comprising a transconductance element coupled to said second terminal for filtering said signal, wherein said impedance element has a highpass filter characteristic and wherein said impedance element further comprises a feedback capacitor in a feedback loop around said transconductance element; a comparator coupled to said impedance element for comparing said signal; and a reference voltage source coupled to said impedance element and to said comparator, wherein said transconductance element comprises: an amplifier having a first amplifier input, a second amplifier input, and an amplifier output; a field effect transistor (FET) having a gate terminal, a first FET terminal, and a second FET terminal, said amplifier output coupled to said gate terminal, said first amplifier input coupled to said first FET terminal, said second FET terminal coupled to a first feedback capacitor terminal of said feedback capacitor, and said second amplifier input coupled to a second feedback capacitor terminal of said feedback capacitor.
Claim 2
Dependent Claim 194 words
Apparatus comprising: a driver for providing a signal; a capacitor having a first terminal and a second terminal, said first terminal coupled to said driver, said capacitor for coupling said signal from said first terminal to said second terminal; an impedance element comprising a transconductance element coupled to said second terminal for filtering said signal, wherein said impedance element has a highpass filter characteristic and wherein said impedance element further comprises a feedback capacitor in a feedback loop around said transconductance element; a comparator coupled to said impedance element for comparing said signal; and a reference voltage source coupled to said impedance element and to said comparator, wherein said transconductance element comprises: an amplifier having a first amplifier input, a second amplifier input, and an amplifier output; a field effect transistor (FET) having a gate terminal, a first FET terminal, and a second FET terminal, said amplifier output coupled to said gate terminal, said first amplifier input coupled to said first FET terminal, said second FET terminal coupled to a first feedback capacitor terminal of said feedback capacitor, and said second amplifier input coupled to a second feedback capacitor terminal of said feedback capacitor.
Claim 3
Dependent Claim 17 words
The apparatus of claim 1 wherein said reference voltage source is coupled to said first amplifier input.
Claim 4
Dependent Claim 15 words
The apparatus of claim 2 wherein said capacitor couples said signal across an isolation barrier.
Claim 5
Dependent Claim 17 words
The apparatus of claim 3 wherein said isolation barrier isolates a modem circuit from a telephone line.
Claim 6
Dependent Claim 15 words
The apparatus of claim 4 wherein said impedance element rejects low frequency common mode signals.
Claim 7
Dependent Claim 12 words
The apparatus of claim 5 wherein said signal is a clock signal.

References Cited (Backward Citations)

US4556864A Cited
US4493092A Cited
US4697166A Cited
US5253249A Cited
US5325395A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-07-02 2000-01-01 2000-07-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-07-02 2004-01-01 2004-07-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-07-02 2008-01-01 2008-07-02 $7700.00 Window Closed / Lapsed

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