US5532508A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device with LDD structure
Assignee: Sharp Corp
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Filing: 1995-05-22
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Granted: 1996-07-02
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Expires: 2015-05-22
Abstract
Abstract A method for manufacturing a semiconductor device including steps of forming a gate oxide film and a gate electrode on a semiconductor substrate; implanting impurity ions of the same conductivity as the substrate in an oblique direction at a first tilt angle to the normal line of the substrate and with a first acceleration voltage and dose, while rotating the substrate about the normal line thereof; implanting impurities of the same conductivity as the substrate in the same manner except for using a tilt angle to the normal line which is greater and a dose which is smaller than that of the first tilt angle and dose; and forming source and drain regions by implanting impurity ions of the opposite conductivity to the substrate into the substrate, followed by performing a thermal treatment.
Inventors
- 👤 Seiji Kaneko
- 👤 Tomoya Baba
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 17:36
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D62/307; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10P; H10P30/00; H10P30/20; H10P30/22; H10P30/221; H10P30/222
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
132 words
A semiconductor device comprising an MOS type field effect transistor comprising: a semiconductor substrate having a gate oxide film and a gate electrode thereon; source and drain regions formed of ion implanted regions of opposite conductivity type to the substrate on opposite sides of a channel region; and plural pairs of impurity ion implanted regions having a same conductivity type as the substrate, which comprise: a first shallow pair of impurity ion implanted regions located in the channel region under the gate electrode, and having a higher impurity concentration than that of the channel region; and a second pair of impurity ion implanted regions provided in a position deeper than the first shallow pair of impurity ion implanted regions and equal in depth or shallower than a depth of said source/drain regions.
Claim 2
Dependent Claim
132 words
A semiconductor device comprising an MOS type field effect transistor comprising: a semiconductor substrate having a gate oxide film and a gate electrode thereon; source and drain regions formed of ion implanted regions of opposite conductivity type to the substrate on opposite sides of a channel region; and plural pairs of impurity ion implanted regions having a same conductivity type as the substrate, which comprise: a first shallow pair of impurity ion implanted regions located in the channel region under the gate electrode, and having a higher impurity concentration than that of the channel region; and a second pair of impurity ion implanted regions provided in a position deeper than the first shallow pair of impurity ion implanted regions and equal in depth or shallower than a depth of said source/drain regions.
Claim 3
Dependent Claim
51 words
A semiconductor device according to claim 1, in which the second pair of impurity ion implanted regions has an impurity ion concentration lower than the first pair of impurity ion implanted regions, and the first and the second pair of impurity ion implanted regions have a conductivity greater than the substrate.
Claim 4
Dependent Claim
82 words
A semiconductor device according to claim 1, in which concentration distributions of implanted impurity ions of the opposite conductivity type to the substrate are gradually reduced in a vertical direction from the surface of the substrate in the source and drain regions, and a concentration distribution of each of the implanted impurity ion regions of the same conductivity type as the substrate is gradually reduced in a horizontal direction from the source and drain regions towards the center of the channel region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-07-02 | 2000-01-01 | 2000-07-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-07-02 | 2004-01-01 | 2004-07-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-07-02 | 2008-01-01 | 2008-07-02 | $7700.00 | Window Closed / Lapsed |