US5523964A
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Ferroelectric non-volatile memory unit
Assignee: Symetrix Corp
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Filing: 1994-04-07
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Granted: 1996-06-04
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Expires: 2014-04-07
Abstract
Abstract An integrated circuit non-volatile, non-destructive read-out memory unit includes a ferroelectric capacitor having first and second electrodes, a capacitance Cf, and an area Af, and a transistor having a gate, a source and a drain forming a gate capacitor having an area Ag and a gate capacitance Cg, a gate overlap b, and a channel depth a, with the capacitor first electrode connected to the gate of the transistor. The ferroelectric material has a dielectric constant εf and the gate insulator has a dielectric constant εg. A source of a constant reference voltage is connectable to the first electrode. A bit line connects to the second electrode. In one embodiment the first electrode and gate are the same conductive member. In another embodiment the second electrode and the gate are the same conductive member and the first electrode is formed by extensions of the transistor source and drains underlying the gate, with the ferroelectric material between the source and drain extensions and the gate. The memory unit has the parametric relationships: Cf<5×Cg, Af≦2Ag, b≧2a, and εg≧εf/8.
Inventors
- 👤 Larry D. McMillan
- 👤 Takashi Mihara
- 👤 Hiroyuki Yoshimori
- 👤 John W. Gregory
- 👤 Carlos A. Paz de Araujo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 09:08
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/22; G11C11/223
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
70 words
A ferroelectric non-volatile, non-destructive read-out memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate, said first electrode of said capacitor connected to said gate of said transistor, a bit line for carrying a data signal, and means for applying said bit line data signal to said second electrode of said capacitor.
Claim 2
Dependent Claim
70 words
A ferroelectric non-volatile, non-destructive read-out memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate, said first electrode of said capacitor connected to said gate of said transistor, a bit line for carrying a data signal, and means for applying said bit line data signal to said second electrode of said capacitor.
Claim 3
Dependent Claim
114 words
A ferroelectric, non-volatile, integrated circuit memory unit comprising: a transistor comprising first and second active regions, a channel region between said first and second active regions, and a conductive gate layer; and a ferroelectric capacitor comprising a first electrode comprising a portion of at least one of said first active region and said second active region, said first electrode underlying said conductive gate layer, a second electrode comprising said conductive gate layer, and a ferroelectric layer between said first electrode and said second electrode, wherein said first electrode spans a distance in a direction parallel to said conductive gate layer that is greater than the distance spanned by said channel region in said direction.
Claim 4
Dependent Claim
114 words
A ferroelectric, non-volatile, integrated circuit memory unit comprising: a transistor comprising first and second active regions, a channel region between said first and second active regions, and a conductive gate layer; and a ferroelectric capacitor comprising a first electrode comprising a portion of at least one of said first active region and said second active region, said first electrode underlying said conductive gate layer, a second electrode comprising said conductive gate layer, and a ferroelectric layer between said first electrode and said second electrode, wherein said first electrode spans a distance in a direction parallel to said conductive gate layer that is greater than the distance spanned by said channel region in said direction.
Claim 5
Dependent Claim
31 words
A ferroelectric, non-volatile, integrated circuit memory unit as in claim 2 wherein said first electrode comprises a portion of said first active region and a portion of said second active region.
Claim 6
Dependent Claim
29 words
A memory unit as in claim 3 wherein said transistor is a MOS transistor, said first active region comprises a source, and said second active region comprises a drain.
Claim 7
Dependent Claim
24 words
A memory unit as in claim 2 and further including a substrate, and wherein said first electrode comprises a doped area of said substrate.
Claim 8
Dependent Claim
31 words
A memory unit as in claim 2 and further comprising an insulating layer between said ferroelectric layer and said first electrode, said insulating layer having a dielectric constant greater than 50.
Claim 9
Dependent Claim
90 words
A ferroelectric, non-volatile, integrated circuit memory unit comprising a transistor comprising first and second active regions, a channel region between said first and second active regions, a conductive gate layer, and a ferroelectric material between said channel region and said conductive gate layer, wherein said first and second active regions extend under said ferroelectric layer and conductive gate layer a sufficient distance to polarize said ferroelectric material to saturation with a voltage of less than 10 volts applied between said conductive gate layer and said first and second active regions.
Claim 10
Dependent Claim
90 words
A ferroelectric, non-volatile, integrated circuit memory unit comprising a transistor comprising first and second active regions, a channel region between said first and second active regions, a conductive gate layer, and a ferroelectric material between said channel region and said conductive gate layer, wherein said first and second active regions extend under said ferroelectric layer and conductive gate layer a sufficient distance to polarize said ferroelectric material to saturation with a voltage of less than 10 volts applied between said conductive gate layer and said first and second active regions.
Claim 11
Dependent Claim
39 words
A memory unit as in claim 7 wherein the distance said first and second active regions extend under said conductive gate layer exceeds the distance spanned by said channel region in a direction parallel to said conductive gate layer.
Claim 12
Dependent Claim
74 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate having a gate capacitance Cg, said first electrode of said capacitor connected to said gate of said transistor, said ferroelectric capacitor having a capacitance Cf and said memory unit having a load capacitance Cl comprising said gate capacitance Cg, wherein Cf<5×Cl.
Claim 13
Dependent Claim
74 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate having a gate capacitance Cg, said first electrode of said capacitor connected to said gate of said transistor, said ferroelectric capacitor having a capacitance Cf and said memory unit having a load capacitance Cl comprising said gate capacitance Cg, wherein Cf<5×Cl.
Claim 14
Dependent Claim
13 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 9 wherein Cf<2×Cl.
Claim 15
Dependent Claim
29 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 9 wherein said integrated circuit includes a field oxide layer and said capacitor is fabricated on said field oxide.
Claim 16
Dependent Claim
69 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate, a source and a drain forming a gate capacitor having an area Ag, said first electrode of said capacitor connected to said gate of said transistor, said ferroelectric capacitor having an area Af, and wherein Af≦2Ag.
Claim 17
Dependent Claim
69 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate, a source and a drain forming a gate capacitor having an area Ag, said first electrode of said capacitor connected to said gate of said transistor, said ferroelectric capacitor having an area Af, and wherein Af≦2Ag.
Claim 18
Dependent Claim
13 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 12 wherein Af≦Ag.
Claim 19
Dependent Claim
29 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 12 wherein said integrated circuit includes a field oxide layer and said capacitor is fabricated on said field oxide.
Claim 20
Dependent Claim
59 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate, a source and a drain, said gate overlapping said source and drain by a distance b, said transistor having a channel depth a, and wherein b>a.
Claim 21
Dependent Claim
59 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate, a source and a drain, said gate overlapping said source and drain by a distance b, said transistor having a channel depth a, and wherein b>a.
Claim 22
Dependent Claim
13 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 15 wherein b≧2a.
Claim 23
Dependent Claim
29 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 15 wherein said integrated circuit includes a field oxide layer and said capacitor is fabricated on said field oxide.
Claim 24
Dependent Claim
70 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate and a gate insulator, said first electrode of said capacitor connected to said gate of said transistor, said ferroelectric material having a dielectric constant εf and said gate insulator having a dielectric constant εg, and wherein εg≧εf/8.
Claim 25
Dependent Claim
70 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate and a gate insulator, said first electrode of said capacitor connected to said gate of said transistor, said ferroelectric material having a dielectric constant εf and said gate insulator having a dielectric constant εg, and wherein εg≧εf/8.
Claim 26
Dependent Claim
13 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 18 wherein εg≧εf/4.
Claim 27
Dependent Claim
29 words
A ferroelectric non-volatile, integrated circuit memory unit as in claim 18 wherein said integrated circuit includes a field oxide layer and said capacitor is fabricated on said field oxide.
Claim 28
Dependent Claim
61 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate and a gate insulator, said first electrode of said capacitor connected to said gate of said transistor, and said gate insulator having a dielectric constant greater than 4.
Claim 29
Dependent Claim
61 words
A ferroelectric non-volatile, integrated circuit memory unit comprising a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material between said first and second electrodes, a transistor having a gate and a gate insulator, said first electrode of said capacitor connected to said gate of said transistor, and said gate insulator having a dielectric constant greater than 4.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-06-04 | 1999-12-04 | 2000-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-06-04 | 2003-12-04 | 2004-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-06-04 | 2007-12-04 | 2008-06-04 | $7700.00 | Window Closed / Lapsed |