Patent US5523795A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5523795A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for serial transmission and/or reception of nonsynchronous, multiplexed signals

Assignee: Sony Corp
•
Filing: 1994-08-16
•
Granted: 1996-06-04
•
Expires: 2014-08-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method and an apparatus capable of transmitting and receiving multiplexed signals as serial data in such a manner that, even in a state where a continuous signal such as an audio digital signal is not in synchronism with another signal such as a video digital signal, the continuous signal can be properly reproduced on a reception side. Address data based on a word clock of another digital signal is sampled on a transmission side in accordance with a sampling clock of the continuous signal, and the sampled address value is included in the multiplexed signals to be thereby transmitted together to the reception side. Then on the reception side, a word clock synchronously locked to the word clock of the transmission-side another digital signal is reproduced from the received serial data, and address data is generated on the basis of the reproduced word clock, so that the reception-side clock of the continuous signal is reproduced from the generated address data and the transmitted address value included in the multiplexed signals, whereby the continuous signal is reproduced in accordance with the clock thus reproduced.

Inventors

  • 👤 Mamoru Ueda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 15:26
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04N; H04N21/00; H04N21/20; H04N21/23; H04N21/236; H04N21/2368; H04N21/242; H04N21/40; H04N21/43; H04N21/4302; H04N21/4305; H04N21/434; H04N21/4341; H04N7/00; H04N7/24; H04N7/52; H04N7/54; H04N7/56; H04J2203/00; H04J2203/0001; H04J2203/0073; H04J2203/008; H04J2203/0087

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 83 words
A method for transmission of multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said method comprising the steps of: generating an address based on a clock signal of said second digital sample signal; sampling the generated address by the use of a sampling clock signal of said continuous signal to produce a sampled address value; and transmitting the multiplexed signals inclusive of the sampled address value inserted therein.
Claim 2
Independent Claim 83 words
A method for transmission of multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said method comprising the steps of: generating an address based on a clock signal of said second digital sample signal; sampling the generated address by the use of a sampling clock signal of said continuous signal to produce a sampled address value; and transmitting the multiplexed signals inclusive of the sampled address value inserted therein.
Claim 3
Dependent Claim 93 words
The method according to claim 1, further comprising the steps of: receiving serial data on a reception side and reproducing, from the received serial data, a first clock signal synchronized with a transmission-side clock signal of said second digital sample signal; generating address data on the basis of the reproduced first clock signal; generating a second clock signal for reproduction of said continuous signal from both the generated address data and an address value separated from the received serial data; and reproducing said continuous signal in accordance with the generated second clock signal.
Claim 4
Dependent Claim 28 words
The method according to claim 1, wherein a word clock signal of said second digital sample signal is equal to a word clock signal of the multiplexed signals.
Claim 5
Dependent Claim 44 words
The method according to claim 1, wherein said continuous signal is an audio signal, and said second digital sample signal is a digital video signal, and the sample signal of said audio signal is multiplexed during a blanking period of said digital video signal.
Claim 6
Independent Claim 106 words
An apparatus for transmission of multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said apparatus comprising: a circuit for generating an address based on a clock signal of said second digital sample signal; a circuit for sampling the generated address by the use of a sampling clock signal of said continuous signal to produce a sampled address value; a circuit for inserting the sampled address value into said multiplexed signals; and a circuit for converting said multiplexed signals, where the address value is inserted, into serial data for transmitting the same.
Claim 7
Independent Claim 106 words
An apparatus for transmission of multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said apparatus comprising: a circuit for generating an address based on a clock signal of said second digital sample signal; a circuit for sampling the generated address by the use of a sampling clock signal of said continuous signal to produce a sampled address value; a circuit for inserting the sampled address value into said multiplexed signals; and a circuit for converting said multiplexed signals, where the address value is inserted, into serial data for transmitting the same.
Claim 8
Dependent Claim 136 words
The apparatus according to claim 5, further comprising: a circuit for receiving serial data and separating, on a reception side, the received serial data into said first digital sample signal of the continuous signal, said second digital sample signal and said address value; a circuit for reproducing a first clock signal synchronized with the clock signal of said second digital sample signal; a circuit for generating address data on the basis of the reproduced first clock signal; a comparator circuit for comparing the generated address data with the address value of the received received serial data; a circuit for generating a second clock signal for reproduction of said continuous signal on the basis of an output of said comparator circuit; and a circuit for reproducing said continuous signal in accordance with the generated second clock signal.
Claim 9
Dependent Claim 28 words
The apparatus according to claim 5, wherein a word clock signal of said second digital sample signal is equal to a word clock signal of said multiplexed signal.
Claim 10
Dependent Claim 44 words
The apparatus according to claim 5, wherein said continuous signal is an audio signal, and said second digital sample signal is a digital video signal, and the sample signal of said audio signal is multiplexed during the blanking period of said digital video signal.
Claim 11
Independent Claim 242 words
An apparatus for transmitting and receiving multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said apparatus comprising: a circuit for generating a word address based on a word clock signal of said second digital sample signal; a circuit for sampling the generated word address in accordance with the sampling clock signal of said continuous signal to produce a word address value; a circuit for inserting the word address value into said multiplexed signals; a circuit for converting said multiplexed signals, where the word address value is inserted, into serial data for transmitting the same; a circuit for receiving the serial data and separating the received serial data into said first digital sample signal of the continuous signal, said second digital sample signal and said word address value; a circuit for reproducing a first word clock signal synchronized with a word clock signal of said second digital sample signal; a circuit for generating word address data on the basis of the reproduced first word clock signal; a comparator circuit for comparing the generated word address data with the word address value of the received serial data; a circuit for generating a second word clock signal for reproduction of said continuous signal on the basis of the output of said comparator circuit; and a circuit for reproducing said continuous signal in accordance with the generated second word clock signal.
Claim 12
Independent Claim 242 words
An apparatus for transmitting and receiving multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said apparatus comprising: a circuit for generating a word address based on a word clock signal of said second digital sample signal; a circuit for sampling the generated word address in accordance with the sampling clock signal of said continuous signal to produce a word address value; a circuit for inserting the word address value into said multiplexed signals; a circuit for converting said multiplexed signals, where the word address value is inserted, into serial data for transmitting the same; a circuit for receiving the serial data and separating the received serial data into said first digital sample signal of the continuous signal, said second digital sample signal and said word address value; a circuit for reproducing a first word clock signal synchronized with a word clock signal of said second digital sample signal; a circuit for generating word address data on the basis of the reproduced first word clock signal; a comparator circuit for comparing the generated word address data with the word address value of the received serial data; a circuit for generating a second word clock signal for reproduction of said continuous signal on the basis of the output of said comparator circuit; and a circuit for reproducing said continuous signal in accordance with the generated second word clock signal.
Claim 13
Dependent Claim 28 words
The apparatus according to claim 9, wherein the word clock signal of said second digital sample signal is equal to the word clock signal of the multiplexed signal.
Claim 14
Dependent Claim 44 words
The apparatus according to claim 9, wherein said continuous signal is an audio signal, and said second digital sample signal is a digital video signal, and the sample signal of said audio signal is multiplexed during the blanking period of said digital video signal.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-06-04 1999-12-04 2000-06-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-06-04 2003-12-04 2004-06-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-06-04 2007-12-04 2008-06-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag