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US5519708A
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System for converting synchronous time-division signals into asynchronous time-division data packets
Assignee: US Philips Corp
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Filing: 1995-04-17
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Granted: 1996-05-21
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Expires: 2015-04-17
Abstract
Abstract System for converting synchronous time-division (STD) signals into asynchronous data packets (ATD), in which the incoming and outgoing signals are spread over various (multiplex) channels. Not more than a single RAM and a single FIFO are utilized for various channels together. The RAM is subdivided into rows and columns, one column per channel, data packets being preferably stored in successive columns shifted by at least 1 row.
Inventors
- 👤 Hendrik Van Der Veen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 22:26
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04J; H04J3/00; H04J3/16; H04J3/1605; H04J3/1611; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04L2012/5614; H04L2012/5618; H04L2012/5672
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
167 words
A system for converting a synchronous time-division signal into an asynchronous time-division data packet, comprising: first storage means having an input for receiving the synchronous time-division signal, said first storage means further having an output, wherein said first storage means is a random access memory divided into columns and rows, wherein each column of the random access memory corresponds to an asynchronous time-division data packet and each row of the column corresponds to a byte of the asynchronous time-division data packet; second storage means having an input for receiving the synchronous time-division signal from said first storage means, said second storage means further having an output; and control means for sending an address signal to said second storage means for converting the synchronous time-division signal into the asynchronous time-division data packet, wherein the synchronous time-division signal is transmitted from the random access memory to said second storage means when a predetermined number of rows in a column of the random access memory have received the time-division signal.
Claim 2
Independent Claim
167 words
A system for converting a synchronous time-division signal into an asynchronous time-division data packet, comprising: first storage means having an input for receiving the synchronous time-division signal, said first storage means further having an output, wherein said first storage means is a random access memory divided into columns and rows, wherein each column of the random access memory corresponds to an asynchronous time-division data packet and each row of the column corresponds to a byte of the asynchronous time-division data packet; second storage means having an input for receiving the synchronous time-division signal from said first storage means, said second storage means further having an output; and control means for sending an address signal to said second storage means for converting the synchronous time-division signal into the asynchronous time-division data packet, wherein the synchronous time-division signal is transmitted from the random access memory to said second storage means when a predetermined number of rows in a column of the random access memory have received the time-division signal.
Claim 3
Dependent Claim
27 words
The system as claimed in claim 1, wherein the address signal is a header and wherein said control means transmits the header to said second storage means.
Claim 4
Dependent Claim
51 words
The system as claimed in claim 1, wherein the address signal is a packet header and wherein said control means transmits the packet header to said second storage means, the packet header being combined with the synchronous time-division signal in said second storage means to form the asynchronous time-division data packet.
Claim 5
Dependent Claim
17 words
The system as claimed in claim 2, wherein said second storage means is a first-in first-out memory.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-21 | 1999-11-20 | 2000-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-21 | 2003-11-20 | 2004-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-21 | 2007-11-20 | 2008-05-21 | $7700.00 | Window Closed / Lapsed |