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US5518947A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of forming a semiconductor memory device having silicon nitride overlying only in peripheral circuit area

Assignee: Sony Corp
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Filing: 1995-06-05
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Granted: 1996-05-21
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Expires: 2015-06-05
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Abstract

Abstract According to this invention, after a semiconductor nitride film is formed on the entire surface of a semiconductor memory device, the semiconductor nitride film on a memory cell portion is removed. After a semiconductor oxide-based film is formed as an interlayer insulator on the entire surface of the semiconductor memory device, the semiconductor oxide-based film on a peripheral circuit portion is removed using the semiconductor nitride film as a stopper. For this reason, a shallow contact hole is formed in the peripheral circuit portion, and highly reliable wiring can be obtained. In addition, since hydrogen can be supplied to a surface of a semiconductor substrate in the memory cell portion by hydrogen annealing, an interface state on the surface can be eliminated, and the data retention characteristics of the memory cells can be improved.

Inventors

  • 👤 Masanori Noda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:20
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4403; H10W20/4405; Y; Y10; Y10S; Y10S438/00; Y10S438/91

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 140 words
A method of manufacturing a semiconductor memory device having a peripheral circuit portion and a memory cell portion which is constituted by a transistor and a capacitor, comprising the steps of: forming said capacitor in said memory cell portion which includes a first nitride layer; forming a first SiO 2 film on an entire surface of said semiconductor memory device and over said first nitride layer after forming said capacitor; forming a second nitride of SiN film on an entire surface of said first SiO 2 film; completely removing said second nitride SiN film formed on said memory cell portion; then forming a second SiO 2 film on an entire surface of said semiconductor memory device; and removing said second SiO 2 film formed on said peripheral circuit portion using said second nitride of SiN film as an etch stopper.
Claim 2
Independent Claim 140 words
A method of manufacturing a semiconductor memory device having a peripheral circuit portion and a memory cell portion which is constituted by a transistor and a capacitor, comprising the steps of: forming said capacitor in said memory cell portion which includes a first nitride layer; forming a first SiO 2 film on an entire surface of said semiconductor memory device and over said first nitride layer after forming said capacitor; forming a second nitride of SiN film on an entire surface of said first SiO 2 film; completely removing said second nitride SiN film formed on said memory cell portion; then forming a second SiO 2 film on an entire surface of said semiconductor memory device; and removing said second SiO 2 film formed on said peripheral circuit portion using said second nitride of SiN film as an etch stopper.
Claim 3
Dependent Claim 39 words
A method according to claim 1, further comprising the step of performing hydrogen annealing for eliminating an interface state of said memory cell portion after the step of removing said second SiO 2 film on said peripheral circuit portion.

References Cited (Backward Citations)

US5275972A Cited
US5158905A Cited
US5320976A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-05-21 1999-11-20 2000-05-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-05-21 2003-11-20 2004-05-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-05-21 2007-11-20 2008-05-21 $7700.00 Window Closed / Lapsed

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