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US5518943A
Expired / Lapsed
US
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Method of manufacturing nonvolatile semiconductor memory device having an implanted damage layer
Assignee: Toshiba Corp
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Filing: 1995-05-25
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Granted: 1996-05-21
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Expires: 2015-05-25
Abstract
Abstract A gate insulating film is provided on the upper surface of an N-type silicon substrate. A floating gate is provided on the gate insulating film, an ONO film is provided on the floating gate, and a control gate is provided on the ONO film. Two diffusion layers for a source and a drain, respectively, are formed by using the control gate as a mask, in self-alignment, in the upper surface of the N-type silicon substrate. A damage layer is formed in a region of the semiconductor substrate, which is located beneath the first gate. The damage layer has an impurity concentration which is the highest at a point located in a depletion layer formed when a data-writing voltage is applied to the memory device and which is located outside a depletion layer formed when a data-reading voltage is applied to the memory device.
Inventors
- 👤 Hiroaki Tsunoda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/01; H10D30/021; H10D30/0411; H10D62/00; H10D62/50; H10D62/53
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
172 words
A method of manufacturing a nonvolatile semiconductor memory device, comprising the steps of: forming a damage layer in a semiconductor substrate region by implanting argon ions into said semiconductor substrate, said damage layer having a highest argon concentration at a point which is located in a depletion layer formed when a data-writing voltage is applied to the memory device and located outside a depletion layer formed when a data-reading voltage is applied to the memory device; forming a gate insulating film on an upper surface of said semiconductor substrate; depositing a first conductive layer on said gate insulating film; forming an insulating film on said first conductive layer; depositing a second conductive layer on said insulating film; patterning said second conductive layer, said insulating film and said first conductive layer, thereby forming a first gate on said gate insulating film and a second gate on said insulating film; and forming source and drain regions in the upper surface of said semiconductor substrate, in self-alignment, by using said second gate as a mask.
Claim 2
Independent Claim
172 words
A method of manufacturing a nonvolatile semiconductor memory device, comprising the steps of: forming a damage layer in a semiconductor substrate region by implanting argon ions into said semiconductor substrate, said damage layer having a highest argon concentration at a point which is located in a depletion layer formed when a data-writing voltage is applied to the memory device and located outside a depletion layer formed when a data-reading voltage is applied to the memory device; forming a gate insulating film on an upper surface of said semiconductor substrate; depositing a first conductive layer on said gate insulating film; forming an insulating film on said first conductive layer; depositing a second conductive layer on said insulating film; patterning said second conductive layer, said insulating film and said first conductive layer, thereby forming a first gate on said gate insulating film and a second gate on said insulating film; and forming source and drain regions in the upper surface of said semiconductor substrate, in self-alignment, by using said second gate as a mask.
Claim 3
Independent Claim
232 words
A method of manufacturing a nonvolatile semiconductor memory device, comprising the steps of: forming a gate insulating film on an upper surface of a semiconductor substrate; depositing a first conductive layer on said gate insulating film; forming a first insulating film on said first conductive layer; depositing a second conductive layer on said first insulating film; patterning said second conductive layer, said first insulating film and said first conductive layer, thereby forming a first gate on said gate insulating film and a second gate on said first insulating film; forming source and drain regions in the upper surface of said semiconductor substrate, in self-alignment, by using said second gate as a mask; forming a second insulating film on an upper surface and sides of said second gate, on sides of said first gate, and on sides of said first insulating film; forming a resist on said second insulating film; and forming a damage layer in said semiconductor substrate by implanting argon ions applied at a particular angle to the upper surface of the semiconductor substrate, into said semiconductor substrate, by using said resist as a mask, said damage layer having a highest argon concentration at a point which is located in a depletion layer formed when a data-writing voltage is applied to the memory device and located outside a depletion layer formed when a data-reading voltage is applied to the memory device.
Claim 4
Independent Claim
232 words
A method of manufacturing a nonvolatile semiconductor memory device, comprising the steps of: forming a gate insulating film on an upper surface of a semiconductor substrate; depositing a first conductive layer on said gate insulating film; forming a first insulating film on said first conductive layer; depositing a second conductive layer on said first insulating film; patterning said second conductive layer, said first insulating film and said first conductive layer, thereby forming a first gate on said gate insulating film and a second gate on said first insulating film; forming source and drain regions in the upper surface of said semiconductor substrate, in self-alignment, by using said second gate as a mask; forming a second insulating film on an upper surface and sides of said second gate, on sides of said first gate, and on sides of said first insulating film; forming a resist on said second insulating film; and forming a damage layer in said semiconductor substrate by implanting argon ions applied at a particular angle to the upper surface of the semiconductor substrate, into said semiconductor substrate, by using said resist as a mask, said damage layer having a highest argon concentration at a point which is located in a depletion layer formed when a data-writing voltage is applied to the memory device and located outside a depletion layer formed when a data-reading voltage is applied to the memory device.
Claim 5
Dependent Claim
14 words
A method according to claim 2, wherein said first gate is a floating gate.
Claim 6
Dependent Claim
14 words
A method according to claim 2, wherein said second gate is a control gate.
Claim 7
Dependent Claim
15 words
A method according to claim 2, wherein said first insulating film is an ONO film.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-21 | 1999-11-20 | 2000-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-21 | 2003-11-20 | 2004-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-21 | 2007-11-20 | 2008-05-21 | $7700.00 | Window Closed / Lapsed |