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US4642881A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing nonvolatile semiconductor memory device by forming additional impurity doped region under the floating gate

Assignee: Toshiba Corp
•
Filing: 1985-05-17
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Granted: 1987-02-17
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Expires: 2005-05-17
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Abstract

Abstract A method of manufacturing a nonvolatile semiconductor memory device having a gate oxide layer including a relatively thin silicon dioxide layer. This gate oxide layer including the thin silicon dioxide layer is formed by the steps of forming the gate oxide film on a semiconductor element region in a silicon substrate; removing a portion of the gate oxide film to expose a portion of the silicon substrate; implanting impurity ions in the exposed portion of the substrate to an extent that a peak concentration of the impurity ions exceeds a solid solution limit at a temperature of the following thermal annealing step; activating the implanted impurity by thermal annealing so as to form a high impurity concentration layer and thermally oxidizing a surface of the high impurity concentration layer to form the thin silicon dioxide layer.

Inventors

  • 👤 Naohiro Matsukawa
  • 👤 Sigeru Morita
  • 👤 Hiroshi Nozawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 15:52
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/681; H10D30/683; H10D64/00; H10D64/01; H10D64/031; H10D64/035; H10P30/202; H10P30/204; H10P30/28; Y; Y10; Y10S; Y10S148/00; Y10S148/082

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 193 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film on a surface of a silicon substrate of a first conductivity type and forming an island element region isolated by said insulating film; (ii) thereafter forming a gate oxide film including a relatively thin silicon dioxide film portion in said element region by thermal oxidation; and (iii) thereafter forming a floating gate electrode at least on said silicon dioxide film portion, wherein the step (ii) of forming said gate oxide film comprises the steps of: (a) forming said gate oxide film on said element region; (b) thereafter removing a portion of said gate oxide film to expose a portion of said silicon substrate, and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof exceeds a solid solution limit at a temperature in the following thermal annealing step; (c) thereafter activating the implanted impurity by thermal annealing so as to form a high concentration impurity layer; and (d) thereafter thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film.
Claim 2
Independent Claim 193 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film on a surface of a silicon substrate of a first conductivity type and forming an island element region isolated by said insulating film; (ii) thereafter forming a gate oxide film including a relatively thin silicon dioxide film portion in said element region by thermal oxidation; and (iii) thereafter forming a floating gate electrode at least on said silicon dioxide film portion, wherein the step (ii) of forming said gate oxide film comprises the steps of: (a) forming said gate oxide film on said element region; (b) thereafter removing a portion of said gate oxide film to expose a portion of said silicon substrate, and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof exceeds a solid solution limit at a temperature in the following thermal annealing step; (c) thereafter activating the implanted impurity by thermal annealing so as to form a high concentration impurity layer; and (d) thereafter thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film.
Claim 3
Dependent Claim 34 words
A method according to claim 1, wherein the ion-implantation in the step (b) is performed by ion-implanting an impurity or an impurity combination selected from the group consisting of arsenic, phosphorus, arsenic/phosphorus, and arsenic/boron.
Claim 4
Dependent Claim 25 words
A method according to claim 1, wherein the thermal annealing in the step (c) is performed in an oxygen atmosphere diluted with an inert gas.
Claim 5
Dependent Claim 27 words
A method according to claim 1, wherein in the step (d), said silicon dioxide thin film is formed in an oxygen atmosphere diluted with an inert gas.
Claim 6
Dependent Claim 28 words
A method according to claim 1, wherein in the step (d), said silicon dioxide thin film is formed in a water vapor atmosphere diluted with an inert gas.
Claim 7
Dependent Claim 24 words
A method according to claim 1, wherein ion-implantation is performed in a channel region after forming the gate oxide film in the step (a).
Claim 8
Dependent Claim 24 words
A method according to claim 1, wherein the thermal annealing in the step (c) is performed at a temperature not lower than 400° C.
Claim 9
Dependent Claim 44 words
A method according to claim 1, wherein the ion-implantation in the step (b) is performed to obtain an impurity concentration of 1×10 19 cm -3 to 5×10 20 cm -3 in the high concentration impurity layer after the thermal annealing in the step (c).
Claim 10
Dependent Claim 41 words
A method according to claim 1, wherein the ion-implantation in the step (b) is performed using a combination of p-type and n-type impurities, and a difference in impurity carrier concentration thereof is set to be within ±1×10 14 cm -3 .
Claim 11
Dependent Claim 19 words
A method according to claim 1, wherein the ion-implantation in the step (b) is performed in a channel region.
Claim 12
Dependent Claim 31 words
A method according to claim 1, wherein the ion-implantation in the step (b) is performed in a portion of a drain region and a portion of a channel region adjacent thereto.
Claim 13
Dependent Claim 19 words
A method according to claim 1, wherein the ion-implantation in the step (b) is performed in a drain region.
Claim 14
Dependent Claim 33 words
A method according to claim 1, wherein the ion-implantation in the step (b) is performed so that the implanted impurity is partially precipitated as clusters at a temperature in the thermal annealing step.
Claim 15
Dependent Claim 14 words
A method according to claim 3 wherein said inert gas is argon or nitrogen.
Claim 16
Dependent Claim 14 words
A method according to claim 4 wherein said inert gas is argon or nitrogen.
Claim 17
Dependent Claim 14 words
A method according to claim 5 wherein said inert gas is argon or nitrogen.
Claim 18
Dependent Claim 22 words
A method according to claim 7, wherein the thermal annealing in the step (c) is performed at a temperature of 900° C.
Claim 19
Dependent Claim 14 words
A method according to claim 8, wherein ions to be implanted are arsenic ions.
Claim 20
Independent Claim 167 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film on a surface of a silicon substrate of a first conductivity type and forming an island element region isolated by said insulating film; (ii) thereafter forming a gate oxide film including a relatively thin silicon dioxide film portion in said element region by thermal oxidation; and (iii) thereafter forming a floating gate electrode at least on said silicon dioxide film portion, wherein the step (ii) of forming said gate oxide film comprises the steps of: (a) forming said gate oxide film on said element region; (b) thereafter removing a portion of said gate oxide film to expose a portion of said silicon substrate, and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof ultimately exceeds a solid solution limit; and (c) thereafter thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film.
Claim 21
Independent Claim 167 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film on a surface of a silicon substrate of a first conductivity type and forming an island element region isolated by said insulating film; (ii) thereafter forming a gate oxide film including a relatively thin silicon dioxide film portion in said element region by thermal oxidation; and (iii) thereafter forming a floating gate electrode at least on said silicon dioxide film portion, wherein the step (ii) of forming said gate oxide film comprises the steps of: (a) forming said gate oxide film on said element region; (b) thereafter removing a portion of said gate oxide film to expose a portion of said silicon substrate, and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof ultimately exceeds a solid solution limit; and (c) thereafter thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film.

References Cited (Backward Citations)

US4149905A Cited
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US4203158B1 Cited
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US4514897A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-02-16 1990-08-18 1991-02-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-02-16 1994-08-18 1995-02-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-02-16 1998-08-18 1999-02-17 $7700.00 Window Closed / Lapsed

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