US5517629A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Methods for analyzing computer program performance
Assignee: Individual
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Filing: 1995-01-30
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Granted: 1996-05-14
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Expires: 2015-01-30
Abstract
Abstract A method for analyzing program execution characteristics such as the minimum and maximum execution time, and maximum stack depth of a processor. The process examines every possible path through a program accumulating required information. The results guarantee best or worst case results since every path is examined. The time to produce these results is greatly reduced over other methods.
Inventors
- 👤 R. Nick K. Boland
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 02:26
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/30; G06F11/34; G06F11/3409; G06F11/3419; G06F11/3447; G06F2201/00; G06F2201/865; G06F2201/88
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
162 words
A computer implemented process for analyzing computer program instruction characteristics in a data processing system, said data processing system executing a plurality of instructions, said instructions having instruction characteristics, said computer implemented process comprising the steps of: (a) selecting an instruction for analysis; (b) determining if instruction characteristics for instructions following the selected instruction are known; (c) analyzing, if a result of said determining step is negative, said instructions following said selected instruction to determine instruction characteristics thereof; (d) analyzing said selected instruction to determine instruction characteristics thereof; and (e) saving said instruction characteristics determined in steps (c) and (d); wherein said instruction characteristics include execution time and the computer implemented process further comprises the steps of: (f) repeating steps (a)-(e) until execution times for all branches of said plurality of instruction have been analyzed; and (g) using said saved execution times to determine at least one of a maximum execution time and a minimum execution time for said plurality of instruction.
Claim 2
Dependent Claim
162 words
A computer implemented process for analyzing computer program instruction characteristics in a data processing system, said data processing system executing a plurality of instructions, said instructions having instruction characteristics, said computer implemented process comprising the steps of: (a) selecting an instruction for analysis; (b) determining if instruction characteristics for instructions following the selected instruction are known; (c) analyzing, if a result of said determining step is negative, said instructions following said selected instruction to determine instruction characteristics thereof; (d) analyzing said selected instruction to determine instruction characteristics thereof; and (e) saving said instruction characteristics determined in steps (c) and (d); wherein said instruction characteristics include execution time and the computer implemented process further comprises the steps of: (f) repeating steps (a)-(e) until execution times for all branches of said plurality of instruction have been analyzed; and (g) using said saved execution times to determine at least one of a maximum execution time and a minimum execution time for said plurality of instruction.
Claim 3
Dependent Claim
14 words
The computer implemented process of claim 1, wherein said instruction characteristics include stack information.
Claim 4
Dependent Claim
250 words
A computer implemented process for analyzing computer program instruction execution time in a data processing system, said data processing system executing a plurality of instructions, said instructions having execution times, said computer implemented process comprising the steps of: (a) setting a counter to a starting address; (b) identifying an instruction at an address pointed to by said counter as a conditional branch instruction or another type of instruction; (c) checking a flag, if said instruction is a conditional branch instruction, to determine if execution time information associated with instructions following the conditional branch instruction has been saved; (d) analyzing, if a result of step (c) is negative, said instructions following said conditional branch instruction to obtain execution time information associated therewith; (e) setting, after said analyzing step, said flag to indicate that said instructions following said conditional branch instruction have been evaluated; (f) retrieving, if said result of step (c) is positive, execution time information associated with said instructions following said conditional branch instruction; (g) analyzing, if said instruction is another type of instruction, said instruction to obtain execution time information associated therewith; (h) saving said instruction execution time information which has been obtained by one of steps (d), (f) or (g); (i) incrementing said counter; (j) repeating steps (b)-(i) until an address in said counter is equal to a stop address; and (k) using said saved execution time information to determine at least one of a maximum execution time and a minimum execution time for said plurality of instructions.
Claim 5
Dependent Claim
250 words
A computer implemented process for analyzing computer program instruction execution time in a data processing system, said data processing system executing a plurality of instructions, said instructions having execution times, said computer implemented process comprising the steps of: (a) setting a counter to a starting address; (b) identifying an instruction at an address pointed to by said counter as a conditional branch instruction or another type of instruction; (c) checking a flag, if said instruction is a conditional branch instruction, to determine if execution time information associated with instructions following the conditional branch instruction has been saved; (d) analyzing, if a result of step (c) is negative, said instructions following said conditional branch instruction to obtain execution time information associated therewith; (e) setting, after said analyzing step, said flag to indicate that said instructions following said conditional branch instruction have been evaluated; (f) retrieving, if said result of step (c) is positive, execution time information associated with said instructions following said conditional branch instruction; (g) analyzing, if said instruction is another type of instruction, said instruction to obtain execution time information associated therewith; (h) saving said instruction execution time information which has been obtained by one of steps (d), (f) or (g); (i) incrementing said counter; (j) repeating steps (b)-(i) until an address in said counter is equal to a stop address; and (k) using said saved execution time information to determine at least one of a maximum execution time and a minimum execution time for said plurality of instructions.
Claim 6
Dependent Claim
245 words
A computer implemented process for analyzing computer program instruction stack information time in a data processing system, said data processing system executing a plurality of instructions, said instructions having execution times, said computer implemented process comprising the steps of: (a) setting a counter to a starting address; (b) identifying an instruction at an address pointed to by said counter as a conditional branch instruction or another type of instruction; (c) checking a flag, if said instruction is a conditional branch instruction, to determine if stack information associated with instructions following the conditional branch instruction has been saved; (d) analyzing, if a result of step (c) is negative, said instructions following said conditional branch instruction to obtain stack information associated therewith; (e) setting, after said analyzing step, said flag to indicate that said instructions following said conditional branch instruction have been evaluated; (f) retrieving, if said result of step (c) is positive, stack information associated with said instructions following said conditional branch instruction; (g) analyzing, if said instruction is another type of instruction, said instruction to obtain stack information associated therewith; (h) saving said instruction stack information which has been obtained by one of steps (d), (f) or (g); (i) incrementing said counter; (j) repeating steps (b)-(i) until an address in said counter is equal to a stop address; and (k) using said saved stack information to determine at least one of a maximum instruction stack and a minimum instruction stack for said plurality of instructions.
Claim 7
Dependent Claim
245 words
A computer implemented process for analyzing computer program instruction stack information time in a data processing system, said data processing system executing a plurality of instructions, said instructions having execution times, said computer implemented process comprising the steps of: (a) setting a counter to a starting address; (b) identifying an instruction at an address pointed to by said counter as a conditional branch instruction or another type of instruction; (c) checking a flag, if said instruction is a conditional branch instruction, to determine if stack information associated with instructions following the conditional branch instruction has been saved; (d) analyzing, if a result of step (c) is negative, said instructions following said conditional branch instruction to obtain stack information associated therewith; (e) setting, after said analyzing step, said flag to indicate that said instructions following said conditional branch instruction have been evaluated; (f) retrieving, if said result of step (c) is positive, stack information associated with said instructions following said conditional branch instruction; (g) analyzing, if said instruction is another type of instruction, said instruction to obtain stack information associated therewith; (h) saving said instruction stack information which has been obtained by one of steps (d), (f) or (g); (i) incrementing said counter; (j) repeating steps (b)-(i) until an address in said counter is equal to a stop address; and (k) using said saved stack information to determine at least one of a maximum instruction stack and a minimum instruction stack for said plurality of instructions.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-14 | 1999-11-13 | 2000-05-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-14 | 2003-11-13 | 2004-05-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-14 | 2007-11-13 | 2008-05-14 | $7700.00 | Window Closed / Lapsed |