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US5514989A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor light emitting element driver circuit

Assignee: Canon Inc
•
Filing: 1993-12-21
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Granted: 1996-05-07
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Expires: 2013-12-21
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Abstract

Abstract A driver circuit comprises a current mirror circuit including an output transistor, a load connected to a main electrode of the output transistor, and current supplying device for supplying a current to a control electrode of the output transistor. The output transistor controls a current flowing through the load.

Inventors

  • 👤 Toshiaki Sato
  • 👤 Toshihiko Ichise
  • 👤 Keiji Ishizuka
  • 👤 Shunichi Morita
  • 👤 Shunichi Kaizu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 08:26
CPC Classifications
H; H01; H01S; H01S5/00; H01S5/04; H01S5/042; H03; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/0412; H03K17/04126; H03K17/51; H03K17/56; H03K17/567; H03K17/60; H01S5/0428

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 132 words
A driver circuit comprising; a current mirror circuit provided with an output transistor having a main electrode connected to a load for supplying a driving current to the load; a first switch connected to a control electrode of the output transistor, for turning on and for cutting off a current flowing into the output transistor; and a current source provided independently of the current mirror circuit, and having a second switch for supplying additional current to the output transistor in a turning on operation, wherein, synchronously with a turning on operation of the first switch, the second switch is turned on to supply the additional current to the output transistor through the current mirror circuit, the additional current being supplied to the control electrode of the output transistor by the current source.
Claim 2
Dependent Claim 132 words
A driver circuit comprising; a current mirror circuit provided with an output transistor having a main electrode connected to a load for supplying a driving current to the load; a first switch connected to a control electrode of the output transistor, for turning on and for cutting off a current flowing into the output transistor; and a current source provided independently of the current mirror circuit, and having a second switch for supplying additional current to the output transistor in a turning on operation, wherein, synchronously with a turning on operation of the first switch, the second switch is turned on to supply the additional current to the output transistor through the current mirror circuit, the additional current being supplied to the control electrode of the output transistor by the current source.
Claim 3
Dependent Claim 24 words
A driver circuit according to claim 1, wherein the current mirror circuit comprises a pair of bipolar transistors, and a pair of MOS transistors.
Claim 4
Dependent Claim 20 words
A driver circuit according to claim 1, wherein the current source comprises a second current mirror circuit comprising PMOS transistors.
Claim 5
Dependent Claim 20 words
A driver circuit according to claim 1, wherein the current source comprises a second current mirror circuit comprising PNP transistors.
Claim 6
Dependent Claim 29 words
A driver circuit according to claim 1, wherein the current source comprises a second current mirror circuit having a pair of NPN transistors and a pair of PMOS transistors.
Claim 7
Dependent Claim 142 words
A driver circuit for driving a load device, said driver circuit comprising: a current mirror circuit provided with an output transistor having a main electrode connected to the load device for supplying a driving current to the load device; a first switch connected to a control electrode of the output transistor for turning on and for cutting off a current flowing into the output transistor; and a current source provided independently of the current mirror circuit, and having a second switch for supplying additional current to the output transistor in a turning on operation; wherein, synchronously with a turning on operation of the first switch, the second switch is turned on to supply the additional current to the output transistor through the current mirror circuit, the additional current being supplied to the control electrode of the output transistor by the current source.
Claim 8
Dependent Claim 142 words
A driver circuit for driving a load device, said driver circuit comprising: a current mirror circuit provided with an output transistor having a main electrode connected to the load device for supplying a driving current to the load device; a first switch connected to a control electrode of the output transistor for turning on and for cutting off a current flowing into the output transistor; and a current source provided independently of the current mirror circuit, and having a second switch for supplying additional current to the output transistor in a turning on operation; wherein, synchronously with a turning on operation of the first switch, the second switch is turned on to supply the additional current to the output transistor through the current mirror circuit, the additional current being supplied to the control electrode of the output transistor by the current source.
Claim 9
Dependent Claim 24 words
A driver circuit according to claim 6, wherein the current mirror circuit comprises a pair of bipolar transistors and a pair of MOS transistors.
Claim 10
Dependent Claim 20 words
A driver circuit according to claim 6, wherein the current source comprises a second current mirror circuit of PMOS transistors.
Claim 11
Dependent Claim 20 words
A driver circuit according to claim 6, wherein the current source comprises a second current mirror circuit of PNP transistors.
Claim 12
Dependent Claim 20 words
A driver circuit according to claim 6, wherein having a pair of NPN transistors and a pair of PMOS transistors.
Claim 13
Dependent Claim 171 words
A recording apparatus comprising a photosensitive body, a charger for charging the photosensitive body, an exposing means for exposing the photosensitive body to light, and a developer, wherein the exposing means comprises: a semiconductor light emitting element, a current mirror circuit comprising a main electrode connected to the semiconductor light emitting diode, and an output transistor for supplying a driving current to the semiconductor light emitting element; a first switch connected to a control electrode of the output transistor, for turning on and for cutting off a current flowing into the output transistor; and a current source provided independently of the current mirror circuit, and having a second switch for supplying additional current to the output transistor in a turning on operation, wherein, synchronously with a turning on operation of the first switch, the second switch is turned on and the output transistor is supplied with the additional current through the current mirror circuit, the additional current being supplied to the control electrode of the output transistor by the current source.
Claim 14
Dependent Claim 171 words
A recording apparatus comprising a photosensitive body, a charger for charging the photosensitive body, an exposing means for exposing the photosensitive body to light, and a developer, wherein the exposing means comprises: a semiconductor light emitting element, a current mirror circuit comprising a main electrode connected to the semiconductor light emitting diode, and an output transistor for supplying a driving current to the semiconductor light emitting element; a first switch connected to a control electrode of the output transistor, for turning on and for cutting off a current flowing into the output transistor; and a current source provided independently of the current mirror circuit, and having a second switch for supplying additional current to the output transistor in a turning on operation, wherein, synchronously with a turning on operation of the first switch, the second switch is turned on and the output transistor is supplied with the additional current through the current mirror circuit, the additional current being supplied to the control electrode of the output transistor by the current source.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-05-07 1999-11-06 2000-05-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-05-07 2003-11-06 2004-05-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-05-07 2007-11-06 2008-05-07 $7700.00 Window Closed / Lapsed

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