High resolution circuit and method for sensing antifuses

Claim 2

A sense amplifier for sensing the state of first and second antifuses, comprising: a first node capable of being coupled through the first antifuse to ground, and further capable of being coupled to an output pin to thereby provide an output signal on the output pin; a second node capable of being coupled through the second antifuse to a supply voltage; a sensing circuit for providing at the first node a first output signal of a first logic type if neither of the antifuses is programmed, and for providing at the first node a second output signal of a second logic type if either or both of the antifuses are programmed; and a third node for receiving an activating signal for activating the sense amplifier to sense the state of the first and second antifuses.

Claim 3

A sense amplifier as in claim 1 wherein the sensing circuit comprises: a first transistor of a first conductivity type, having a drain coupled to the first node, a source coupled to ground, and a gate; a second transistor of the first conductivity type, having a drain coupled to the second node, a source coupled to ground, and a gate; wherein activating the sense amplifier cross-couples the first and second transistors by causing the gate of the first transistor to be coupled to the drain of the second transistor, and the gate of the second transistor to be coupled to the drain of the first transistor; a third transistor of a second conductivity type, having a source capable of being coupled to the supply voltage, a drain coupled to the first node, and a gate coupled to the third node; and a fourth transistor of the second conductivity type, having a source capable of being coupled to the supply voltage, a drain coupled to the second node, and a gate coupled to the first node, the fourth transistor increasing the feedback between the cross-coupled first and second transistors.

Claim 4

A sense amplifier as in claim 2 wherein the sensing circuit further comprises a fifth transistor for coupling the first node to the output pin when the sense amplifier is activated.

Claim 5

A sense amplifier as in claim 3 wherein the sensing circuit further comprises sixth and seventh transistors and for ensuring that the first and second transistors are turned off while antifuses R1 and R2 are being programmed.

Claim 6

A sense amplifier as in claim 4 wherein the sensing circuit further comprises eighth and ninth transistors and for isolating the first and second transistors from the programming voltage while antifuses R1 and R2 are being programmed.

Claim 7

A sense amplifier as in claim 1 wherein the sense amplifier is capable of sensing antifuse R1 as being programmed if antifuse R1 has a resistance of 20 KΩ or less.

Claim 8

A sense amplifier as in claim 1 wherein the sense amplifier is capable of sensing antifuse R2 as being programmed if antifuse R2 has a resistance of 20 KΩ or less.

Claim 11

A method as in claim 8 wherein the sensing circuit comprises: a first transistor of a first conductivity type, having a drain coupled to the first node, a source coupled to ground, and a gate; a second transistor of the first conductivity type, having a drain coupled to the second node, a source coupled to ground, and a gate, wherein the first and second transistors are cross-coupled; a third transistor of a second conductivity type, having a source capable of being coupled to the supply voltage, a drain coupled to the first node, and a gate coupled to the third node; and a fourth transistor of the second conductivity type, having a source capable of being coupled to the supply voltage, a drain coupled to the second node, and a gate coupled to the first node, the fourth transistor increasing the feedback between the cross-coupled first and second transistors.

Claim 12

A method as in claim 9 further comprising: providing a fifth transistor for coupling the first node to the output pin when the sense amplifier is activated.

Claim 13

A method as in claim 10 further comprising providing sixth and seventh transistors and for ensuring that the first and second transistors are turned off while antifuses R1 and R2 are being programmed.

Claim 14

A method as in claim 11 further comprising providing eighth and ninth transistors and for isolating the first and second transistors from the programming voltage while antifuses R1 and R2 are being programmed.

Claim 15

A method as in claim 8 wherein the sense amplifier is capable of sensing antifuse R1 as being programmed if antifuse R1 has a resistance of 20 KΩ or less.

Claim 16

A method as in claim 8 wherein the sense amplifier is capable of sensing antifuse R2 as being programmed if antifuse R2 has a resistance of 20 KΩ or less.