Trench capacitor field shield with sidewall contact

Claim 2

A storage capacitor having two electrodes formed in a trench having sidewalls and a bottom wall, the trench located in a semiconductor substrate, the capacitor comprising: a layer of insulator on walls of the trench; a layer of electrically conductive material on said layer of insulator; a node diffusion, one of the electrodes contacting said node diffusion and an electrically conductive member connected to said layer of electrically conductive material, extending through a sidewall portion of said layer of insulator, and contacting a selected region of the substrate other than said node diffusion.

Claim 3

A capacitor as recited in claim 1, wherein said selected region is below the node diffusion.

Claim 4

A capacitor as recited in claim 1, wherein said electrically conductive material is located adjacent only an upper sidewall portion of the trench.

Claim 5

A capacitor as recited in claim 3, wherein said electrically conductive material is laterally adjacent only a region of the substrate of a single conductivity type.

Claim 6

A capacitor as recited in claim 1, wherein said electrically conductive material is positioned adjacent only the sidewalls of the trench.

Claim 7

A capacitor as recited in claim 1, wherein said layer of insulator is also deposited on the bottom of the trench and said electrically conductive material is positioned adjacent the sidewalls and the bottom surface of the trench.

Claim 8

A capacitor as recited in claim 1, wherein said electrically conductive member and said electrically conductive material comprise doped polysilicon.

Claim 9

A capacitor as recited in claim 1, wherein said insulator comprises at least one from the group; silicon dioxide and silicon nitride.

Claim 10

A storage capacitor formed in a trench having sidewalls and a bottom wall, the trench located in a semiconductor substrate, the semiconductor substrate having a plurality of layers of differing impurity type and concentration, at least one of which is held at a substantially fixed potential, the capacitor comprising: a layer of insulator deposited on walls of the trench; a layer of electrically conductive material deposited on said layer of insulator; and an electrically conductive member connected to said layer of electrically conductive material, extending though a sidewall portion of said layer of insulator, and contacting a selected region of the substrate that is held at a substantially fixed potential.

Claim 11

A storage capacitor formed in a trench having sidewalls and a bottom wall, the trench located in a semiconductor substrate, the semiconductor substrate having a plurality of layers of differing impurity type and concentration, at least one of which is held at a substantially fixed potential, the capacitor comprising: a layer of insulator deposited on walls of the trench; a layer of electrically conductive material deposited on said layer of insulator; and an electrically conductive member connected to said layer of electrically conductive material, extending though a sidewall portion of said layer of insulator, and contacting a selected region of the substrate that is held at a substantially fixed potential.

Claim 12

A capacitor as recited in claim 9, wherein said electrically conductive material is located adjacent only an upper sidewall portion of the trench.

Claim 13

A capacitor as recited in claim 10, wherein said electrically conductive material is laterally adjacent only a region of the substrate of a single conductivity type.

Claim 14

A capacitor as recited in claim 9, wherein said electrically conductive material is positioned adjacent only the sidewalls of the trench.

Claim 15

A capacitor as recited in claim 9, wherein said layer of insulator is also deposited on the bottom of the trench and said electrically conductive material is positioned adjacent the sidewalls and the bottom surface of the trench.

Claim 16

A capacitor as recited in claim 9, wherein said electrically conductive member and said electrically conductive material comprise doped polysilicon.

Claim 17

A capacitor as recited in claim 9, wherein said insulator comprises at least one from the group: silicon dioxide and silicon nitride.

Claim 18

A capacitor as recited in claim 9, wherein said region contacted is one from the group: n- well, p- well, n+ buried plate, p+ buried plate, n+ substrate, and p+ substrate.

Claim 19

A memory cell with a transfer device and a storage capacitor, the storage capacitor formed in a trench having sidewalls and a bottom wall, the trench located in a semiconductor substrate, the semiconductor substrate having a plurality of layers of differing impurity type and concentration, at least one of which is held at a fixed potential, the memory cell comprising: a layer of insulator on walls of the trench; a layer of electrically conductive material on said layer of insulator; an electrically conductive member connected to said layer of electrically conductive material, extending though a sidewall portion of said layer of insulator, and contacting a selected region of the substrate that is held at a fixed potential; and a transfer device comprising a bit line contact and diffusion, a gate, and a node diffusion, said node diffusion electrically connected to a storage electrode of the capacitor.

Claim 20

A memory cell with a transfer device and a storage capacitor, the storage capacitor formed in a trench having sidewalls and a bottom wall, the trench located in a semiconductor substrate, the semiconductor substrate having a plurality of layers of differing impurity type and concentration, at least one of which is held at a fixed potential, the memory cell comprising: a layer of insulator on walls of the trench; a layer of electrically conductive material on said layer of insulator; an electrically conductive member connected to said layer of electrically conductive material, extending though a sidewall portion of said layer of insulator, and contacting a selected region of the substrate that is held at a fixed potential; and a transfer device comprising a bit line contact and diffusion, a gate, and a node diffusion, said node diffusion electrically connected to a storage electrode of the capacitor.

Claim 21

A memory cell with a transfer device and a capacitor, the capacitor formed in a trench having sidewalls and a bottom wall, the trench located in a semiconductor substrate, the memory cell comprising: a layer of insulator on walls of the trench; a layer of electrically conductive material on said layer of insulator; a transfer device comprising a bit line contact and a diffusion, a gate, and a node diffusion, said node diffusion electrically connected to a storage node of the capacitor; and an electrically conductive member connected to said layer of electrically conductive material, said member extending through a sidewall portion of said layer of insulator, said member contacting a selected region of the substrate, said region not contacting said node diffusion.

Claim 22

A memory cell with a transfer device and a capacitor, the capacitor formed in a trench having sidewalls and a bottom wall, the trench located in a semiconductor substrate, the memory cell comprising: a layer of insulator on walls of the trench; a layer of electrically conductive material on said layer of insulator; a transfer device comprising a bit line contact and a diffusion, a gate, and a node diffusion, said node diffusion electrically connected to a storage node of the capacitor; and an electrically conductive member connected to said layer of electrically conductive material, said member extending through a sidewall portion of said layer of insulator, said member contacting a selected region of the substrate, said region not contacting said node diffusion.

Claim 23

A trench sidewall connector in a semiconductor substrate, comprising: a semiconductor substrate; a trench in the substrate, said trench having a sidewall; and a conductive layer within said trench at least in part spaced from said sidewall, said layer having an outer and an inner surface, said layer making electrical contain with a portion of said sidewall, said layer held at a substantially fixed potential when in operation.

Claim 24

A trench sidewall connector in a semiconductor substrate, comprising: a semiconductor substrate; a trench in the substrate, said trench having a sidewall; and a conductive layer within said trench at least in part spaced from said sidewall, said layer having an outer and an inner surface, said layer making electrical contain with a portion of said sidewall, said layer held at a substantially fixed potential when in operation.