Patent US5490082A successfully refreshed from Google Patents.
US5490082A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of graphically designing circuits
Assignee: Philips Semiconductors Inc
•
Filing: 1990-11-07
•
Granted: 1996-02-06
•
Expires: 2010-11-07
Abstract
Abstract The present invention relates to methods for designing circuits using graphical representations of control and data flow paths. Such representations afford a circuit designer an opportunity early in the design phase to view the data flow and control flow of a proposed circuit layout. Further, such representations are relatively easy to automatically scan, analyze and reduce into a set of logical notations suitable for input to known, standard logic synthesizers.
Inventors
- 👤 James A. Rowson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 22:15
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
93 words
A method of designing a circuit comprising the steps of: graphically representing both control flow and data flow of the circuit using control primitives and data oriented primitives, said control primitives being indicative of circuit state transitions and said data oriented primitives being indicative of selected datapath elements as affected by said circuit state transitions, such that functional and structural elements of the circuit representation are intermixed; recursively analyzing said graphical representation to produce a textual representation of said circuit, said textual representation being suitable for synthesizing a logic design of the circuit.
Claim 2
Independent Claim
93 words
A method of designing a circuit comprising the steps of: graphically representing both control flow and data flow of the circuit using control primitives and data oriented primitives, said control primitives being indicative of circuit state transitions and said data oriented primitives being indicative of selected datapath elements as affected by said circuit state transitions, such that functional and structural elements of the circuit representation are intermixed; recursively analyzing said graphical representation to produce a textual representation of said circuit, said textual representation being suitable for synthesizing a logic design of the circuit.
Claim 3
Dependent Claim
38 words
A method according to claim 1, wherein at least one of a primitive and a data oriented primitive used to represent a given control feature and data flow, respectively, is placed at plural locations in said graphical representation.
Claim 4
Dependent Claim
25 words
A method according to claim 2, wherein control primitives include timeperiod primitives to represent circuit timing and decision primitives which form a logical decision matrix.
Claim 5
Dependent Claim
48 words
A method according to claim 3, wherein said decision primitives indicate an action which occurs if at least one given condition is satisfied, said step of graphically representing further including a step of labelling each decision primitive with a logic equation to establish said at least one condition.
Claim 6
Dependent Claim
26 words
A method according to claim 4, wherein said step of graphically representing includes identifying different types of control primitives and data oriented primitives with different symbols.
Claim 7
Dependent Claim
30 words
A method according to claim 3, wherein said textual representation is produced by analyzing a relationship between at least one timeperiod control primitive and at least one data oriented primitive.
Claim 8
Dependent Claim
60 words
A method according to claim 6, wherein analysis of said textual representation includes: detecting existence of a connection path between said at least one timeperiod control primitive and said at least one data oriented primitive in said graphical representation, and detecting a logic condition of any decision control primitives in said connection path which must exist to complete said path.
Claim 9
Dependent Claim
32 words
A method according to claim 7, wherein serial connections of primitives in said connection path represent logical AND operations and parallel connections of primitives in said connection path represent logical OR operations.
Claim 10
Dependent Claim
23 words
A method according to claim 3, wherein said data oriented primitives include circuit inputs and outputs, storage elements, mathematical operators and memory references.
Claim 11
Dependent Claim
17 words
A method according to claim 9, wherein said mathematical operators include constants, unary operators and binary operators.
Claim 12
Independent Claim
119 words
A method of designing and implementing a circuit layout comprising the steps of: drawing the circuit layout graphically using control primitives and data oriented primitives, said control primitives being indicative of circuit state transitions and said data oriented primitives being indicative of selected datapath elements as affected by said circuit state transitions, such that functional and structural elements of the circuit representation are intermixed; labelling at least some of said control primitives in said drawing with first logic expressions; recursively analyzing said labelled drawing automatically to derive a set o logic expressions indicative of control flow and data flow in the circuit layout; and inputting said set of logic expressions to a logic synthesizer for implementing said circuit layout.
Claim 13
Independent Claim
119 words
A method of designing and implementing a circuit layout comprising the steps of: drawing the circuit layout graphically using control primitives and data oriented primitives, said control primitives being indicative of circuit state transitions and said data oriented primitives being indicative of selected datapath elements as affected by said circuit state transitions, such that functional and structural elements of the circuit representation are intermixed; labelling at least some of said control primitives in said drawing with first logic expressions; recursively analyzing said labelled drawing automatically to derive a set o logic expressions indicative of control flow and data flow in the circuit layout; and inputting said set of logic expressions to a logic synthesizer for implementing said circuit layout.
Claim 14
Dependent Claim
29 words
A method according to claim 11, wherein said set of logic expressions is derived from interconnections of said control primitives, said data oriented primitives and said first logic expressions.
Claim 15
Independent Claim
107 words
A method of designing a circuit comprising the steps of: graphically illustrating both control flow and data flow of the circuit using control primitives and data oriented primitives, at least some of which are connected to form control paths and data paths, said control primitives being indicative of circuit state transitions and said data oriented primitives being indicative of selected datapath elements as affected by said circuit state transitions, such that functional and structural elements of the circuit representation are intermixed; and, labelling at least some of said control primitives with logical expressions to establish conditions associated with activation of said control paths and said data paths.
Claim 16
Independent Claim
107 words
A method of designing a circuit comprising the steps of: graphically illustrating both control flow and data flow of the circuit using control primitives and data oriented primitives, at least some of which are connected to form control paths and data paths, said control primitives being indicative of circuit state transitions and said data oriented primitives being indicative of selected datapath elements as affected by said circuit state transitions, such that functional and structural elements of the circuit representation are intermixed; and, labelling at least some of said control primitives with logical expressions to establish conditions associated with activation of said control paths and said data paths.
Claim 17
Dependent Claim
25 words
A method according to claim 13, wherein said control primitives include timeperiod primitives to indicate control flow by enabling register transfer operations within said circuit.
Claim 18
Dependent Claim
18 words
A method according to claim 14, wherein said control primitives include decision primitives having logical expressions associated therewith.
Claim 19
Dependent Claim
27 words
A method according to claim 15, wherein said control primitives can be combined in said control paths and said data paths to form more complex logic expressions.
References Cited (Backward Citations)
US4700317A
Cited
US4813013A
Cited
US4703435A
Cited
US4831543A
Cited
US5034899A
Cited
US4896272A
Cited
US4922432A
Cited
US5005136A
Cited
US4954953A
Cited
US4970664A
Cited
US4967367A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-02-05 | 1999-08-07 | 2000-02-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-05 | 2003-08-07 | 2004-02-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-05 | 2007-08-07 | 2008-02-06 | $7700.00 | Window Closed / Lapsed |