Machine process for converting one representation of an electronic integrated circuit into another representation

Claim 1

A machine process for converting a behavioral representation of an electronic integrated circuit from one form to another form; said behavioral representation of the electronic integrated circuit, in one form, has a plurality of inputs and a plurality of outputs, and a plurality of nodes interconnecting a plurality of logical elements, which are in the primitives of a first simulator; said behavioral representation in another form is generated for further processing by a second simulator and is in the primitives and in the syntax of the second simulator; said machine process being implemented by the use of a programmed digital computer having stored therein a program; said method comprising the steps of: (a) inputting data on pin locations, logic equation and timing delays from said inputs to said outputs of said electronic integrated circuit, into said program; (b) generating a first representation of said electronic integrated circuit based upon said data on said pin locations, logic equation and timing delays, said first representation having a plurality of nodes interconnecting a plurality of first electronic logic circuit elements, each of said elements is a primitive of said first simulator; (c) converting said first representation into a second representation, which is a logical equivalent of said first representation, in accordance with the rules of boolean algebra, and in accordance with the following: (i) changing representations of all directly serially connected first electronic logic circuit elements into a representation of a second electronic logic circuit element; (ii) changing said first electronic logic circuit elements into electronic logic circuit elements of said second representation, which are primitives of said second simulation program, but which are not directly serially connected primitives; (d) determining the timing delay for each electronic logic circuit element of said second representation; (e) converting said second representation into a third representation by converting all of the electronic logic circuit elements of said second representation into primitives of said second simulation program; and (f) generating said third representation in the syntax of said second simulation program for further processing by said second simulation program.