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US5485037A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having a thermal dissipator and electromagnetic shielding

Assignee: Amkor Technology Singapore Holding Pte Ltd
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Filing: 1995-03-27
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Granted: 1996-01-16
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Expires: 2015-03-27
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Abstract

Abstract An inexpensive packaged integrated circuit with improved heat dissipative capacity and electrical performance. In one embodiment, the packaged integrated circuit includes a semiconductor die, a plurality of electrically conductive package leads, a thermal induction plate and a plurality of electrically conductive bond wires. A surface of the thermal induction plate may remain exposed outside the package. The thermal induction plate reduces package lead inductance and provides shielding of electromagnetic radiation that can cause electromagnetic interference. Preferably, holes are formed through the thermal induction plate to enhance flow of the package material during formation of a package and provide interlocking of the package to the remainder of the integrated circuit. In another embodiment, the packaged integrated circuit further includes a heat sink having a surface exposed to the exterior of the package. The heat sink may also perform an electrical function such as, for instance, acting as a power or ground plane. One or more generally conductive layers can be added to either of the above embodiments. The generally conductive layer or layers may be used to provide ground planes, power planes and/or electrically conductive traces for signal routing or an interconnect ring. The generally conductive layer or layers enable uniform power and ground supplies to be provided to the circuitry formed on the die, reduce package lead inductance, provide decoupling capacitances that reduce switching noise and crosstalk, and allow increased flexibility in the placement of particular circuit components.

Inventors

  • 👤 Robert C. Marrs

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 11:12
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/70; H10W40/77; H10W40/778; H10W42/00; H10W42/20; H10W74/00; H10W74/01; H10W74/016; H10W74/10; H10W74/111; H10W74/124; H10W72/00; H10W72/50; H10W72/531; H10W72/536; H10W72/5366; H10W72/541; H10W72/547; H10W72/5473; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 252 words
An integrated circuit package, comprising: a semiconductor die, the die having a first surface, electrically conductive circuitry on said first surface and a plurality of electrically conductive bond pads positioned at peripheral edges of the first surface; a plurality of electrically conductive package leads for transmitting electrical signals to and from the integrated circuit, each package lead having a first surface and a second surface opposite the lead first surface, each of the leads having an inner portion spaced from and juxtaposed to respective ones of said bond pads; a thermal induction plate including a first planar section extending in a band overlying the inner portions of the plurality of the package leads and having a band first surface positioned immediately adjacent to and electrically isolated from said inner portions of the first surface of the each of the package leads; means for making electrical connection between selected package leads and selected juxtaposed bond pads on the die; said thermal conduction plate having a second planar section and a first surface overlying and spaced from said die first surface, said bond pads and said means for making electrical connection; a molded electrical insulative encapsulant encapsulating the semiconductor die, the inner portions of the package leads, the thermal induction plate and the means for making electrical connection to form an encapsulated package; and wherein said thermal induction plate extends substantially coextensive with the encapsulated package and such that said thermal induction plate reduces electrical noise, crosstalk and radiated electromagnetic energy from said circuitry.
Claim 2
Dependent Claim 252 words
An integrated circuit package, comprising: a semiconductor die, the die having a first surface, electrically conductive circuitry on said first surface and a plurality of electrically conductive bond pads positioned at peripheral edges of the first surface; a plurality of electrically conductive package leads for transmitting electrical signals to and from the integrated circuit, each package lead having a first surface and a second surface opposite the lead first surface, each of the leads having an inner portion spaced from and juxtaposed to respective ones of said bond pads; a thermal induction plate including a first planar section extending in a band overlying the inner portions of the plurality of the package leads and having a band first surface positioned immediately adjacent to and electrically isolated from said inner portions of the first surface of the each of the package leads; means for making electrical connection between selected package leads and selected juxtaposed bond pads on the die; said thermal conduction plate having a second planar section and a first surface overlying and spaced from said die first surface, said bond pads and said means for making electrical connection; a molded electrical insulative encapsulant encapsulating the semiconductor die, the inner portions of the package leads, the thermal induction plate and the means for making electrical connection to form an encapsulated package; and wherein said thermal induction plate extends substantially coextensive with the encapsulated package and such that said thermal induction plate reduces electrical noise, crosstalk and radiated electromagnetic energy from said circuitry.
Claim 3
Dependent Claim 38 words
An integrated circuit package as in claim 1, wherein a second surface of the thermal induction plate opposite said second planar section first surface extends exposed to an ambient environment at an exterior surface of the encapsulated package.
Claim 4
Dependent Claim 66 words
An integrated circuit package as in claim 1, further comprising a heat sink, wherein: a second surface of the die opposite the first surface of the die is attached to a first surface of the heat sink; and an inner portion of the second surface of each of the package leads is attached to the first surface of the heat sink by an electrically non-conductive adhesive.
Claim 5
Dependent Claim 44 words
An integrated circuit package as in claim 3, further comprising a plurality of bond wires, each bond wire making electrical connection between a bonding location on the heat sink and a location on at least one of the package leads and said bond pads.
Claim 6
Dependent Claim 29 words
An integrated circuit package as in claim 3, wherein a second surface of the heat sink extends exposed to an ambient environment at an exterior of the encapsulated package.
Claim 7
Dependent Claim 31 words
An integrated circuit package as in claim 5, wherein a second surface of the thermal induction plate extends exposed to an ambient environment at an exterior surface of the encapsulated package.
Claim 8
Dependent Claim 31 words
An integrated circuit package as in claim 3, wherein a second surface of the thermal induction plate extends exposed to an ambient environment at an exterior surface of the encapsulated package.
Claim 9
Dependent Claim 20 words
An integrated circuit package as in claim 1, wherein a plurality of holes are formed through the thermal induction plate.
Claim 10
Dependent Claim 18 words
An integrated circuit package as in claim 1, wherein peripheral edges of the thermal induction plate are castellated.
Claim 11
Dependent Claim 52 words
An integrated circuit package as in claim 1, wherein the first planar section of said thermal conduction plate extends substantially to peripheral sidewalls of said encapsulated package; and an angular section connects the first planar section and said second planar section, said second planar section being parallel to said first planar section.
Claim 12
Dependent Claim 41 words
An integrated circuit package as in claim 1, wherein the means for making electrical connection comprises a plurality of electrically conductive bond wires, each bond wire making electrical connection between one of the package leads and one of the bond pads.
Claim 13
Dependent Claim 45 words
An integrated circuit package as in claim 1, wherein the band overlying the inner portions of the plurality of leads extends peripherally around said die and further including means for connecting said first planar section and said second planar section of said thermal conduction plate.
Claim 14
Dependent Claim 31 words
An integrated circuit package as in claim 1 further, comprising: a first electrically conductive layer spaced from said plurality of electrically conductive package leads and spaced from said thermal induction plate.
Claim 15
Dependent Claim 35 words
An integrated circuit as in claim 13, further comprising a heat sink, wherein a second surface of the die opposite the first surface of the die is attached to a surface of the heat sink.
Claim 16
Dependent Claim 47 words
An integrated circuit as in claim 14, further comprising a plurality of bond wires, the plurality of bond wires making electrical connection between selected ones of the package leads, bonding locations on the electrically conductive layer and bonding locations on the heat sink and the bond pads.
Claim 17
Dependent Claim 29 words
An integrated circuit as in claim 3, further comprising a second electrically conductive layer spaced from said first electrically conductive layer and said plurality of electrically conductive package leads.
Claim 18
Dependent Claim 24 words
An integrated circuit as in claim 16, wherein the first and second electrically conductive layers are located on opposite sides of the package leads.
Claim 19
Dependent Claim 25 words
An integrated circuit as in claim 16, wherein the first and second electrically conductive layers are located on the same side of the package leads.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-01-15 1999-07-17 2000-01-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-01-15 2003-07-17 2004-01-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-01-15 2007-07-17 2008-01-16 $7700.00 Window Closed / Lapsed

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