← Back to Patent Explorer
US5483024A Expired / Lapsed US ⏱️ 0.0 years remaining

High density semiconductor package

Assignee: Texas Instruments Inc
•
Filing: 1993-10-08
•
Granted: 1996-01-09
•
Expires: 2013-10-08
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The invention discloses a high density semiconductor package. In one embodiment, two semiconductor chips are each affixed on a corresponding one of two lead frames. The semiconductor chips and the lead frames are encapsulated, wherein only a portion of the leads of the lead frames protrudes and extends from the package.

Inventors

  • 👤 Ernest J. Russell
  • 👤 Daniel A. Baudouin
  • 👤 Duy-Loan T. Le
  • 👤 James Wallace

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 07:17
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W90/00; H10W90/811; H10W72/00; H10W72/851; H10W72/853; H10W72/865; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 143 words
A method for providing a semiconductor integrated circuit device having two semiconductor chips and two lead frames, said method comprising the steps of: providing a first and second lead frame, each lead frame having a plurality of leads; providing a first and second semiconductor chip, each semiconductor chip having a plurality of electrical interface points; electrically connecting each of the electrical interface points on the respective semiconductor chip to a corresponding lead on the respective lead frame; positioning the semiconductor chips and the lead frames such that the first and second semiconductor chips are side by side and sandwiched between the first and second lead frames; encapsulating the first and second semiconductor chips and a portion of each of the first and second lead frames in a package, wherein the remaining portion of the leads of the lead frames protrude from the package.
Claim 2
Independent Claim 143 words
A method for providing a semiconductor integrated circuit device having two semiconductor chips and two lead frames, said method comprising the steps of: providing a first and second lead frame, each lead frame having a plurality of leads; providing a first and second semiconductor chip, each semiconductor chip having a plurality of electrical interface points; electrically connecting each of the electrical interface points on the respective semiconductor chip to a corresponding lead on the respective lead frame; positioning the semiconductor chips and the lead frames such that the first and second semiconductor chips are side by side and sandwiched between the first and second lead frames; encapsulating the first and second semiconductor chips and a portion of each of the first and second lead frames in a package, wherein the remaining portion of the leads of the lead frames protrude from the package.
Claim 3
Dependent Claim 47 words
The method according to claim 1 wherein the electrically connecting step includes the step of connecting the electrical interface points and the lead frames with conducting bonding wires, each of the bonding wires electrically connecting one lead of the plurality of leads to a corresponding bonding pad.
Claim 4
Dependent Claim 57 words
The method according to claim 1 wherein the electrically connecting step includes the step of connecting the electrical interface points and the lead frames with bonding pads, wherein each bonding pad is covered with a layer of conductive material to form a bump that allows for the direct attachment of the bonding pads to a corresponding lead.
Claim 5
Dependent Claim 41 words
The method according to claim 1 wherein the positioning step includes the step of positioning the lead frames together and orienting the lead frames such that the protruding leads of the first and second lead frames extend in the same direction.
Claim 6
Dependent Claim 48 words
The method according to claim 1 wherein the positioning step includes the step of positioning the lead frames together and orienting the lead frames such that the protruding leads of the first lead frame extend in the opposite direction from the protruding leads of the second lead frame.
Claim 7
Dependent Claim 59 words
The method according to claim 1 wherein the encapsulation step includes the step of encapsulating the first and second semiconductor chips and portions of the first and second lead frames with a material forming a thin package, the package having mounting posts on one side of the package for vertical mounting of the package on a printed circuit board.

References Cited (Backward Citations)

US3925801A Cited
US5049527A Cited
US5014112A Cited
US4809054A Cited
US4975763A Cited
US5296737A Cited
US5151559A Cited
US5331235A Cited
US5295044A Cited
US5327325A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-01-08 1999-07-10 2000-01-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-01-08 2003-07-10 2004-01-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-01-08 2007-07-10 2008-01-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag