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US5470775A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of forming a polysilicon-on-silicide capacitor

Assignee: Philips Semiconductors Inc
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Filing: 1993-11-09
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Granted: 1995-11-28
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Expires: 2013-11-09
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Abstract

Abstract A method produces a capacitor. On a substrate, a first polysilicon layer is formed over an insulating region. A metal-silicide layer is formed on top of the first polysilicon layer. A dielectric layer is formed on top of the metal-silicide layer. A second polysilicon layer is formed on top of the dielectric layer. The second polysilicon layer and the dielectric layer are etched to form a top electrode and dielectric region. The metal-silicide layer and the first polysilicon layer are etched to form a bottom electrode.

Inventors

  • 👤 Subhash R. Nariani

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 21:54
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10D1/60; H10D1/68

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 88 words
A method for producing a capacitor comprising the steps of: (a) forming a first polysilicon layer over an insulating region on a substrate; (b) forming a metal-silicide layer on top of the first polysilicon layer; (c) forming a dielectric layer on top of the metal-silicide layer; (d) forming a second polysilicon layer on top of the dielectric layer; (e) etching the second polysilicon layer to form a top electrode; and, (f) after step (e) etching the metal-silicide layer and the first polysilicon layer to form a bottom electrode.
Claim 2
Independent Claim 88 words
A method for producing a capacitor comprising the steps of: (a) forming a first polysilicon layer over an insulating region on a substrate; (b) forming a metal-silicide layer on top of the first polysilicon layer; (c) forming a dielectric layer on top of the metal-silicide layer; (d) forming a second polysilicon layer on top of the dielectric layer; (e) etching the second polysilicon layer to form a top electrode; and, (f) after step (e) etching the metal-silicide layer and the first polysilicon layer to form a bottom electrode.
Claim 3
Dependent Claim 26 words
A method as in claim 1 wherein step (f) includes etching the metal-silicide layer and the first polysilicon layer to form a gate of a transistor.
Claim 4
Dependent Claim 17 words
A method as in claim 1 wherein in step (b) the metal-silicide layer is composed of Tungsten-silicide.
Claim 5
Dependent Claim 19 words
A method as in claim 1 wherein step (e) includes etching the dielectric layer to form a dielectric region.
Claim 6
Dependent Claim 19 words
A method as in claim 1 wherein step (f) includes etching the dielectric layer to form a dielectric region.
Claim 7
Dependent Claim 28 words
A method as in claim 1 additionally comprising the following step performed after step (e) and before step (f): etching the dielectric layer to form a dielectric region.
Claim 8
Dependent Claim 22 words
A method as in claim 1 wherein the etching in step (e) additionally forms a resistor on top of a dielectric region.
Claim 9
Dependent Claim 16 words
A method as in claim 1 wherein the etching in step (f) additionally forms a resistor.
Claim 10
Independent Claim 86 words
A method for producing a capacitor comprising the steps of: (a) forming a conductive layer over an insulating region on a substrate, including forming a doped polysilicon sub-layer and on top of the doped polysilicon sub-layer, forming a metal-silicide sub-layer; (b) forming a dielectric layer on top of the conductive layer; (c) forming a polysilicon layer on top of the dielectric layer; (d) etching the polysilicon layer to form a top electrode; and, (e) after step (d) etching the conductive layer to form a bottom electrode.
Claim 11
Independent Claim 86 words
A method for producing a capacitor comprising the steps of: (a) forming a conductive layer over an insulating region on a substrate, including forming a doped polysilicon sub-layer and on top of the doped polysilicon sub-layer, forming a metal-silicide sub-layer; (b) forming a dielectric layer on top of the conductive layer; (c) forming a polysilicon layer on top of the dielectric layer; (d) etching the polysilicon layer to form a top electrode; and, (e) after step (d) etching the conductive layer to form a bottom electrode.
Claim 12
Dependent Claim 21 words
A method as in claim 9 wherein step (e) includes etching the conductive layer to form a gate of a transistor.
Claim 13
Dependent Claim 17 words
A method as in claim 9 wherein in step (a) the metal-silicide sub-layer is composed of Tungsten-silicide.
Claim 14
Dependent Claim 18 words
A method as in claim 9 wherein step (d) includes etching the polysilicon layer to form a resistor.
Claim 15
Dependent Claim 18 words
A method as in claim 9 wherein step (e) includes etching the conductive layer to form a resistor.
Claim 16
Dependent Claim 19 words
A method as in claim 9 wherein step (d) includes etching the dielectric layer to form a dielectric region.
Claim 17
Dependent Claim 19 words
A method as in claim 9 wherein step (e) includes etching the dielectric layer to form a dielectric region.
Claim 18
Dependent Claim 28 words
A method as in claim 9 additionally comprising the following step performed after step (d) and before step (e): etching the dielectric layer to form a dielectric region.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-11-27 1999-05-29 1999-11-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-11-27 2003-05-29 2003-11-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-11-27 2007-05-29 2007-11-28 $7700.00 Window Closed / Lapsed

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