US5466619A
Expired / Lapsed
US
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Method for fabricating a thin film transistor
Assignee: SK Hynix Inc
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Filing: 1994-03-09
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Granted: 1995-11-14
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Expires: 2014-03-09
Abstract
Abstract A method for fabricating a thin film transistor including the steps of forming a gate electrode on a substrate; successively depositing a gate insulation layer and a semiconductor layer on the substrate; forming sidewall from semiconductor layer on both said surfaces of the gate electrode by an anisotropic dry etching process; and implanting ions into the semiconductor sidewall. The grain boundaries in the source and drain junctions but not parallel to the channel. prevent leakage current. Thus, the on-to-off current ratio is improved and the device can be designed with a reduced cell size having no off-set margins.
Inventors
- 👤 Jong M. Choi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 10:29
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/32; H10P14/3202; H10P14/3238; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/026; H10D30/031; H10D30/0312; H10D30/0316; H10D30/0321; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10D30/6757; H10D86/00; H10D86/01; H10D86/021; H10D86/0221; H10D86/40; H10D86/60; H10P14/3204; H10P14/3211; H10P14/3242; H10P14/3244; H10P14/3248; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3451; H10P14/3452; H10P14/3456; H10P14/38; H10P14/3802; H10P14/3818
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
86 words
A method for fabricating a thin film transistor, comprising the steps of: forming a gate electrode on a substrate; successively and conformally depositing a gate insulation layer and a semiconductor layer on the substrate and on the gate electrode; forming sidewall spacers from the semiconductor layer on portions of the gate insulation layer formed on sidewalls of the gate electrode by an anisotropic dry etching process; and forming source and drain junctions in the same semiconductor sidewall spacer by implanting ions into the semiconductor sidewall spacers.
Claim 2
Independent Claim
86 words
A method for fabricating a thin film transistor, comprising the steps of: forming a gate electrode on a substrate; successively and conformally depositing a gate insulation layer and a semiconductor layer on the substrate and on the gate electrode; forming sidewall spacers from the semiconductor layer on portions of the gate insulation layer formed on sidewalls of the gate electrode by an anisotropic dry etching process; and forming source and drain junctions in the same semiconductor sidewall spacer by implanting ions into the semiconductor sidewall spacers.
Claim 3
Independent Claim
90 words
A method for fabricating a thin film transistor, comprising the steps of: forming a gate electrode on a substrate; forming a gate insulation layer and semiconductor layer conformally thereon by a solid phase growth process; forming sidewall spacers composed of a semiconductor on portions of the gate insulation layer formed on sidewalls of the gate electrode by anisotropically dry etching the semiconductor layer formed by the solid phase growth process; and forming source and drain junctions in the same semiconductor sidewall spacer by implanting ions into the semiconductor sidewall spacers.
Claim 4
Independent Claim
90 words
A method for fabricating a thin film transistor, comprising the steps of: forming a gate electrode on a substrate; forming a gate insulation layer and semiconductor layer conformally thereon by a solid phase growth process; forming sidewall spacers composed of a semiconductor on portions of the gate insulation layer formed on sidewalls of the gate electrode by anisotropically dry etching the semiconductor layer formed by the solid phase growth process; and forming source and drain junctions in the same semiconductor sidewall spacer by implanting ions into the semiconductor sidewall spacers.
Claim 5
Independent Claim
97 words
A method of fabricating a thin film transistor, comprising the steps of: forming a gate electrode on a substrate; forming a gate insulation layer and semiconductor layer conformally thereon by a solid phase growth process; forming sidewall spacers composed of a semiconductor on portions of the gate insulation layer formed on sidewalls of the gate electrode by anisotropically dry etching the semiconductor layer formed by the solid phase growth process; implanting silicon ions into the sidewall spacers; and forming source and drain junctions in the same semiconductor sidewall spacer by implanting ions into the semiconductor sidewall spacers.
Claim 6
Independent Claim
97 words
A method of fabricating a thin film transistor, comprising the steps of: forming a gate electrode on a substrate; forming a gate insulation layer and semiconductor layer conformally thereon by a solid phase growth process; forming sidewall spacers composed of a semiconductor on portions of the gate insulation layer formed on sidewalls of the gate electrode by anisotropically dry etching the semiconductor layer formed by the solid phase growth process; implanting silicon ions into the sidewall spacers; and forming source and drain junctions in the same semiconductor sidewall spacer by implanting ions into the semiconductor sidewall spacers.
Claim 7
Dependent Claim
20 words
The method of claim 1, wherein the semiconductor layer is deposited to a thickness of 50 Å to 1000 Å.
Claim 8
Dependent Claim
13 words
The method of claim 1, wherein the gate electrode material comprises polycrystalline silicon.
Claim 9
Dependent Claim
20 words
The method of claim 1, wherein the gate electrode is formed to a thickness of 100 Å to 1000 Å.
Claim 10
Dependent Claim
20 words
The method of claim 1, further comprising the step of forming a cap gate insulating layer on the gate electrode.
Claim 11
Dependent Claim
13 words
The method of claim 2, wherein the semiconductor layer material comprises polycrystalline silicon.
Claim 12
Dependent Claim
29 words
The method of claim 2, wherein the solid phase growth process is carried out at a temperature of 500° C. to 600° C. for 30 minutes to 72 hours.
Claim 13
Dependent Claim
12 words
The method of claim 3, wherein the substrate is an insulative substrate.
Claim 14
Dependent Claim
19 words
The method of claim 3, wherein the substrate is a semiconductor substrate on which an insulation layer is formed.
Claim 15
Dependent Claim
26 words
The method of claim 3, wherein the silicon ions are implanted with doses of 10 11 to 10 16 atoms/cm 2 at 10 to 300 keV.
Claim 16
Dependent Claim
14 words
The method of claim 3, wherein the gate insulation layer is an oxide layer.
Claim 17
Dependent Claim
20 words
The method of claim 5, wherein the gate electrode is formed to a thickness of 100 Å to 10000 Å.
References Cited (Backward Citations)
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| 3.5 Years (Year 4) | 1998-11-13 | 1999-05-15 | 1999-11-14 | $2000.00 | Window Closed / Lapsed |
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| 11.5 Years (Year 12) | 2006-11-13 | 2007-05-15 | 2007-11-14 | $7700.00 | Window Closed / Lapsed |