Semiconductor device and a method of manufacturing the same

Claim 1

A method of manufacturing a semiconductor device comprising the steps of: forming an interlayer insulation film on a silicon substrate formed with a junction region, and sequentially depositing a silicon nitride film and a first polysilicon layer on said interlayer insulation film; sequentially etching exposed portions of said first polysilicon layer and said silicon nitride film by an etching process utilizing a contact hole mask, whereby a recess is formed; depositing a polysilicon on the surface of said first polysilicon layer including said recess, and theen etching said polysilicon to form a polysilicon spacer on the inner wall of said recess; etching said interlayer insulation film by an etching process utilizing said first polysilicon layer and said polysilicon spacer as an etching mask until a part of said junction region is exposed, whereby a contact hole is formed; depositing a second polysilicon layer on said first polysilicon film and said polysilicon spacer including said contact hole; sequentially depositing a first oxide film and a third polysilicon layer on said second polysilicon layer; coating a photoresist on said third polysilicon layer, and then forming a photoresist pattern by a photoresist patterning process utilizing a charge storage electrode mask; sequentially etching the exposed part of said third polysilicon layer and said first oxide film by an etching process utilizing said photoresist pattern as an etching mask, whereby the pattern composed of said third polysilicon layer and said first oxide film is formed; removing said photoresist pattern, and then depositing a second oxide film on said second polysilicon layer including said pattern; depositing a polysilicon on said second oxide film, and then etching said polysilicon to form a polysilicon spacer on the inner wall of said pattern; etching the exposed part of said second oxide film until a part of the surface of said second and third polysilicon layers is exposed; etching the exposed part of said second polysilicon layer by an anisotropic polysilicon etching process, whereby the surface of said second polysilicon layer is stepped; etching the exposed part of said second oxide film by the anisotropic oxide etching process to expose said second polysilicon layer between said pattern and said polysilicon spacer; and etching said second polysilicon layer by the anisotropic polysilicon etching process utilizing said first and second oxide films remaining on said second polysilicon layer as an etching barrier layer until said silicon nitride film is exposed and, then removing said remaining first and second oxide films to form a charge storage electrode; forming a dielectric film on the surface of said charge storage electrode, and then forming a plate electrode on said dielectric.

Claim 2

A method of manufacturing a semiconductor device comprising the steps of: forming an interlayer insulation film on a silicon substrate formed with a junction region, and sequentially depositing a silicon nitride film and a first polysilicon layer on said interlayer insulation film; sequentially etching exposed portions of said first polysilicon layer and said silicon nitride film by an etching process utilizing a contact hole mask, whereby a recess is formed; depositing a polysilicon on the surface of said first polysilicon layer including said recess, and theen etching said polysilicon to form a polysilicon spacer on the inner wall of said recess; etching said interlayer insulation film by an etching process utilizing said first polysilicon layer and said polysilicon spacer as an etching mask until a part of said junction region is exposed, whereby a contact hole is formed; depositing a second polysilicon layer on said first polysilicon film and said polysilicon spacer including said contact hole; sequentially depositing a first oxide film and a third polysilicon layer on said second polysilicon layer; coating a photoresist on said third polysilicon layer, and then forming a photoresist pattern by a photoresist patterning process utilizing a charge storage electrode mask; sequentially etching the exposed part of said third polysilicon layer and said first oxide film by an etching process utilizing said photoresist pattern as an etching mask, whereby the pattern composed of said third polysilicon layer and said first oxide film is formed; removing said photoresist pattern, and then depositing a second oxide film on said second polysilicon layer including said pattern; depositing a polysilicon on said second oxide film, and then etching said polysilicon to form a polysilicon spacer on the inner wall of said pattern; etching the exposed part of said second oxide film until a part of the surface of said second and third polysilicon layers is exposed; etching the exposed part of said second polysilicon layer by an anisotropic polysilicon etching process, whereby the surface of said second polysilicon layer is stepped; etching the exposed part of said second oxide film by the anisotropic oxide etching process to expose said second polysilicon layer between said pattern and said polysilicon spacer; and etching said second polysilicon layer by the anisotropic polysilicon etching process utilizing said first and second oxide films remaining on said second polysilicon layer as an etching barrier layer until said silicon nitride film is exposed and, then removing said remaining first and second oxide films to form a charge storage electrode; forming a dielectric film on the surface of said charge storage electrode, and then forming a plate electrode on said dielectric.

Claim 13

A method of manufacturing a semiconductor device, comprising the steps of: forming an interlayer insulation film on a silicon substrate formed with a junction region, and sequentially depositing a silicon nitride film and a first polysilicon layer on said interlayer insulation film; sequentially etching exposed portions of said first polysilicon layer and said silicon nitride film by an etching process utilizing a contact hole mask, whereby a recess is formed; depositing a polysilicon on the surface of said first polysilicon layer including said recess, and etching said polysilicon to form a polysilicon spacer on the inner wall of said recess; etching the interlayer insulation film by an etching process utilizing said first polysilicon layer and said polysilicon spacer as an etching mask until a part of said junction region is exposed, whereby a contact hole is formed; depositing a second polysilicon layer on said first polysilicon film and said polysilicon spacer including said contact hole; sequentially depositing a first oxide film and a third polysilicon layer on said second polysilicon layer; coating a photoresist on said third polysilicon layer, and then forming a plurality of photoresist patterns by a photoresist patterning process utilizing a charge storage electrode mask; sequentially etching the exposed part of said third polysilicon layer and said first oxide film by an etching process utilizing said plurality of photoresist patterns as an etching mask, whereby a plurality of patterns composed of said third polysilicon layer and said first oxide film are formed; removing said plurality of photoresist patterns, and depositing a second oxide film on said second polysilicon layer including said plurality of patterns; depositing a polysilicon on said second oxide film, and then etching said polysilicon to remain in the form of a spacer on the outer wall of, the outer most pattern among the plurality of patterns and kept buried between the patterns; etching the exposed part of said second film by an etching process utilizing the remaining polysilicon as an etching mask until a part of the surface of said second and third polysilicon layer is exposed; etching the exposed part of said second polysilicon layer by an anisotropic polysilicon etching process, whereby the surface of said second polysilicon layer is stepped; etching the exposed part of said second oxide film by an anisotropic oxide etching process to expose said second polysilicon layer between said plurality of patterns and said remained polysilicon; etching said second polysilicon layer by the anisotropic polysilicon etching process utilizing said first and second oxide films remaining on said second polysilicon layer as an etching barrier layer until said silicon nitride film is exposed, and removing said remaining first and second oxide films to form a charge storage electrode; and forming a dielectric film on the surface of said charge storage electrode, and forming a plate electrode on said dielectric.

Claim 14

A method of manufacturing a semiconductor device, comprising the steps of: forming an interlayer insulation film on a silicon substrate formed with a junction region, and sequentially depositing a silicon nitride film and a first polysilicon layer on said interlayer insulation film; sequentially etching exposed portions of said first polysilicon layer and said silicon nitride film by an etching process utilizing a contact hole mask, whereby a recess is formed; depositing a polysilicon on the surface of said first polysilicon layer including said recess, and etching said polysilicon to form a polysilicon spacer on the inner wall of said recess; etching the interlayer insulation film by an etching process utilizing said first polysilicon layer and said polysilicon spacer as an etching mask until a part of said junction region is exposed, whereby a contact hole is formed; depositing a second polysilicon layer on said first polysilicon film and said polysilicon spacer including said contact hole; sequentially depositing a first oxide film and a third polysilicon layer on said second polysilicon layer; coating a photoresist on said third polysilicon layer, and then forming a plurality of photoresist patterns by a photoresist patterning process utilizing a charge storage electrode mask; sequentially etching the exposed part of said third polysilicon layer and said first oxide film by an etching process utilizing said plurality of photoresist patterns as an etching mask, whereby a plurality of patterns composed of said third polysilicon layer and said first oxide film are formed; removing said plurality of photoresist patterns, and depositing a second oxide film on said second polysilicon layer including said plurality of patterns; depositing a polysilicon on said second oxide film, and then etching said polysilicon to remain in the form of a spacer on the outer wall of, the outer most pattern among the plurality of patterns and kept buried between the patterns; etching the exposed part of said second film by an etching process utilizing the remaining polysilicon as an etching mask until a part of the surface of said second and third polysilicon layer is exposed; etching the exposed part of said second polysilicon layer by an anisotropic polysilicon etching process, whereby the surface of said second polysilicon layer is stepped; etching the exposed part of said second oxide film by an anisotropic oxide etching process to expose said second polysilicon layer between said plurality of patterns and said remained polysilicon; etching said second polysilicon layer by the anisotropic polysilicon etching process utilizing said first and second oxide films remaining on said second polysilicon layer as an etching barrier layer until said silicon nitride film is exposed, and removing said remaining first and second oxide films to form a charge storage electrode; and forming a dielectric film on the surface of said charge storage electrode, and forming a plate electrode on said dielectric.