Fast turn on switch circuit with parallel MOS controlled thyristor and silicon controlled rectifier

Claim 3

The method of claim 1 further comprising the step of providing a gate current to the silicon controlled rectifier from a drain of the MOS controlled thyristor.

Claim 4

The method of claim 1 further comprising the step of providing a gate voltage to the MOS controlled thyristor at a desired time interval with respect to the provision of a gate current to the silicon controlled rectifier.

Claim 5

The method of claim 1 wherein initially most of the current flow is through the MOS controlled thyristor and subsequently most of the current flow is through the silicon controlled rectifier.

Claim 6

An electrical switch circuit comprising a MOS controlled thyristor in a first switched path that is connected substantially in parallel with a second switched path comprising a silicon controlled rectifier.

Claim 7

An electrical switch circuit comprising a MOS controlled thyristor in a first switched path that is connected substantially in parallel with a second switched path comprising a silicon controlled rectifier.

Claim 8

The circuit of claim 5 wherein the gate of the MOS controlled thyristor is operated with respect to the gate of the silicon controlled rectifier so that initially most of the current flow is through the MOS controlled thyristor and subsequently most of the current flow is through the silicon controlled rectifier.

Claim 9

The circuit of claim 5 wherein immediately after turn-on of the switch, the MOS controlled thyristor substantially shunts the silicon controlled rectifier for a first period of time and subsequently the silicon controlled rectifier substantially shunts the MOS controlled thyristor.

Claim 10

The circuit of claim 5 wherein said MOS controlled thyristor and said silicon controlled rectifier are in adjacent regions in a monolithic integrated circuit structure.

Claim 11

A semiconductor switch comprising: a silicon controlled rectifier with an initial forward voltage drop responsive to the rate of change of a current there across; a MOS controlled thyristor in a first switched path that is substantially in parallel with a second switched path comprising said silicon controlled rectifier, said MOS controlled thyristor having a smaller initial forward voltage drop than said silicon controlled rectifier; and means for turning on said MOS controlled thyristor no later than said silicon controlled rectifier.

Claim 12

A semiconductor switch comprising: a silicon controlled rectifier with an initial forward voltage drop responsive to the rate of change of a current there across; a MOS controlled thyristor in a first switched path that is substantially in parallel with a second switched path comprising said silicon controlled rectifier, said MOS controlled thyristor having a smaller initial forward voltage drop than said silicon controlled rectifier; and means for turning on said MOS controlled thyristor no later than said silicon controlled rectifier.

Claim 13

The semiconductor switch of claims 9 wherein said means for turning on comprises means for providing a gate current to said silicon controlled rectifier from a drain of said MOS controlled thyristor.

Claim 14

The semiconductor switch of claim 9 wherein said silicon controlled rectifier and said MOS controlled thyristor are in adjacent regions in a single semiconductor device.

Claim 15

The semiconductor switch of claim 9 wherein said silicon controlled rectifier is an amplifying gate silicon controlled rectifier that derives silicon controlled rectifier gate current from the silicon controlled rectifier source.

Claim 16

An electrical switch comprising: first and second switching devices, said first switching device comprising a MOS controlled thyristor and having a faster turn-on time and a higher di/dt capability than said second device; and switch control means controlling the operation of said first and second switching devices such that at the turn-on of the switch a current initially travels substantially through said first switching device, and subsequently substantially through said second switching device, said first switching device having a lower base and lower emitter generally coplanar with the same semiconductor type material as a corresponding lower base and a corresponding lower emitter of said second switching device.

Claim 17

An electrical switch comprising: first and second switching devices, said first switching device comprising a MOS controlled thyristor and having a faster turn-on time and a higher di/dt capability than said second device; and switch control means controlling the operation of said first and second switching devices such that at the turn-on of the switch a current initially travels substantially through said first switching device, and subsequently substantially through said second switching device, said first switching device having a lower base and lower emitter generally coplanar with the same semiconductor type material as a corresponding lower base and a corresponding lower emitter of said second switching device.

Claim 18

The switch of claim 13 wherein said first and second switching devices are integrated into a single semiconductor device in alternating regions thereof.

Claim 19

The switch of claim 13 wherein said MOS controlled thyristor comprises plural generally parallel rows of cells with regions comprising said second switching device between said rows of cells.

Claim 20

An electrical switch circuit comprising: a MOS controlled thyristor having source, drain and gate electrodes; a silicon controlled rectifier having source, drain and gate electrodes, said rectifier being electrically connected to said thyristor substantially in parallel so that the sources of the rectifier and the thyristor are common and the drains of the rectifier and the thyristor are common; a first gate means for selectively applying an electrical signal to the gate electrode of the thyristor; and a second gate means for selectively applying a second electrical signal to the gate electrode of the rectifier, whereby upon turning on the switch circuit and application of a voltage potential between the source and drain electrodes, the first and second gate control circuits are operated to establish initially substantially all of the current in the circuit through the thyristor and subsequently substantially through the rectifier.

Claim 21

An electrical switch circuit comprising: a MOS controlled thyristor having source, drain and gate electrodes; a silicon controlled rectifier having source, drain and gate electrodes, said rectifier being electrically connected to said thyristor substantially in parallel so that the sources of the rectifier and the thyristor are common and the drains of the rectifier and the thyristor are common; a first gate means for selectively applying an electrical signal to the gate electrode of the thyristor; and a second gate means for selectively applying a second electrical signal to the gate electrode of the rectifier, whereby upon turning on the switch circuit and application of a voltage potential between the source and drain electrodes, the first and second gate control circuits are operated to establish initially substantially all of the current in the circuit through the thyristor and subsequently substantially through the rectifier.

Claim 22

The switch circuit of claim 16 wherein said silicon controlled rectifier and said MOS controlled thyristor are in adjacent regions in a monolithic integrated electrical circuit.

Claim 23

The switch circuit of claim 16 wherein a portion of the current flowing through the thyristor is passed into the second gate control circuit.

Claim 24

The switch circuit of claim 18 wherein the second gate control circuit is driven by both current flowing through the thyristor and by current flowing from a source external to the switch circuit.

Claim 25

A semiconductor switch comprising: a silicon controlled rectifier having a first gate terminal; a MOS controlled thyristor having a second gate terminal; and first control means to operate the first and second gate terminals such that when the switch is operated most of the current through the switch flows initially through the MOS controlled thyristor and subsequently through the silicon controlled rectifier.

Claim 26

A semiconductor switch comprising: a silicon controlled rectifier having a first gate terminal; a MOS controlled thyristor having a second gate terminal; and first control means to operate the first and second gate terminals such that when the switch is operated most of the current through the switch flows initially through the MOS controlled thyristor and subsequently through the silicon controlled rectifier.

Claim 27

The switch of claim 20 further comprising: second control means to distribute at least a portion of the current through the MOS controlled thyristor to the first gate terminal.

Claim 28

The switch of claim 20 wherein said first control means provides gate signals to said first and second gate terminals.

Claim 29

The switch of claim 21 further comprising: overload protection means to prevent the first gate terminal from receiving an overload of voltage.

Claim 30

An integral semiconductor switch comprising: a semiconductor member; plural silicon controlled rectifier (SCR) regions in said semiconductor member, each of said SCR regions having an initial forward voltage drop responsive to the rate of change of the current thereacross; and plural MOS controlled thyristor (MCT) regions in said semiconductor member, each operable one of said MCT regions being connected substantially in parallel with said SCR regions and having a smaller initial forward voltage drop than said SCR regions, said MCT regions and said SCR regions being arrayed in alternating portions of said semiconductor member.

Claim 31

An integral semiconductor switch comprising: a semiconductor member; plural silicon controlled rectifier (SCR) regions in said semiconductor member, each of said SCR regions having an initial forward voltage drop responsive to the rate of change of the current thereacross; and plural MOS controlled thyristor (MCT) regions in said semiconductor member, each operable one of said MCT regions being connected substantially in parallel with said SCR regions and having a smaller initial forward voltage drop than said SCR regions, said MCT regions and said SCR regions being arrayed in alternating portions of said semiconductor member.

Claim 32

The switch of claim 24 further comprising means for turning on operable ones of said MCT regions no later than said SCR regions.

Claim 33

A semiconductor device comprising: a silicon controlled rectifier having an anode, a cathode and a gate, with its current conduction path between the anode and cathode formed to extend through at least a portion of a semiconductor substrate, and a MOS controlled thyristor having an anode, a cathode and a gate, with its current conduction path between the anode and the cathode formed to extend through at least a portion of the substrate, for conduction in the same direction as the current path of said rectifier, substantially in parallel to the current conduction path of said rectifier, and extending into at least a portion of the rectifier current path.

Claim 34

A semiconductor device comprising: a silicon controlled rectifier having an anode, a cathode and a gate, with its current conduction path between the anode and cathode formed to extend through at least a portion of a semiconductor substrate, and a MOS controlled thyristor having an anode, a cathode and a gate, with its current conduction path between the anode and the cathode formed to extend through at least a portion of the substrate, for conduction in the same direction as the current path of said rectifier, substantially in parallel to the current conduction path of said rectifier, and extending into at least a portion of the rectifier current path.

Claim 35

A semiconductor device as defined in claim 26 including: circuit means for connecting the rectifier and thyristor gates together so that said thyristor gate receives a gate signal at least as soon as the rectifier gate.

Claim 36

The switch of claim 24 wherein the gate of the MCT is operated with respect to the gate of the SCR so that initially most of the current flow is through the MCT and subsequently most of the current flow is through the SCR.