Method of making a confined planar charge coupled device with edge aligned implants and interconnected electrodes

Claim 1

A method of making, in a first conductivity type semiconductor substrate, a two phase charge coupled device with identical, self-aligned dopant implanted in the semiconductor substrate and underlying electrically connected first phase and second phase plans electrode strips recessed within a trench of insulative material, said trench defining the width of the electrode strips and said electrode strips being coplanar to the surface of the trench, the steps comprising: (a) forming a first insulative layer uniformly overlying the semiconductor substrate; (b) implanting in the semiconductor substrate impurity ions of the second conductivity type; (c) uniformly depositing a second insulative layer of thickness at least as great as the thickness of first and second conductive electrodes to be formed later; (d) patterning in said second insulative layer a trench extending to the top of the first insulative layer; (e) uniformly depositing a first conductive layer; (d) patterning, in the form of closely spaced first conductive strips, the first conductive layer on said first and second insulative layers, the first conductive strips having an exposed surface and being substantially perpendicular to the trench in the second insulative layer; (e) implanting impurity ions into the semiconductor substrate, the implant blocked in regions covered by the first conductive strips to form charge transfer direction biasing implants; (f) providing over the surface of the exposed first conductive strips a third insulating layer; (g) uniformly depositing a second conductive layer; (h) planarizing said uniformly deposited second conductive layer and first conductive strips, to remove the second conductive layer from regions in which it overlaps the first conductive strips and to remove the second conductive layer and the first conductive strips from regions in which they overlap the second insulative layer to the extent that the second conductive layer is patterned into electrically isolated second conductive strips also isolated from the first conductive strips; (i) etching grooves in the regions separating alternate pairs of the first and second conductive strips, the etched regions contiguous with portions of the first and second conductive strips on each side; and (j) filling said grooves with a conductive interconnecting material to electrically connect alternate pairs of strips to form electrically isolated first and second conductive electrodes.

Claim 2

A method of making, in a first conductivity type semiconductor substrate, a two phase charge coupled device with identical, self-aligned dopant implanted in the semiconductor substrate and underlying electrically connected first phase and second phase plans electrode strips recessed within a trench of insulative material, said trench defining the width of the electrode strips and said electrode strips being coplanar to the surface of the trench, the steps comprising: (a) forming a first insulative layer uniformly overlying the semiconductor substrate; (b) implanting in the semiconductor substrate impurity ions of the second conductivity type; (c) uniformly depositing a second insulative layer of thickness at least as great as the thickness of first and second conductive electrodes to be formed later; (d) patterning in said second insulative layer a trench extending to the top of the first insulative layer; (e) uniformly depositing a first conductive layer; (d) patterning, in the form of closely spaced first conductive strips, the first conductive layer on said first and second insulative layers, the first conductive strips having an exposed surface and being substantially perpendicular to the trench in the second insulative layer; (e) implanting impurity ions into the semiconductor substrate, the implant blocked in regions covered by the first conductive strips to form charge transfer direction biasing implants; (f) providing over the surface of the exposed first conductive strips a third insulating layer; (g) uniformly depositing a second conductive layer; (h) planarizing said uniformly deposited second conductive layer and first conductive strips, to remove the second conductive layer from regions in which it overlaps the first conductive strips and to remove the second conductive layer and the first conductive strips from regions in which they overlap the second insulative layer to the extent that the second conductive layer is patterned into electrically isolated second conductive strips also isolated from the first conductive strips; (i) etching grooves in the regions separating alternate pairs of the first and second conductive strips, the etched regions contiguous with portions of the first and second conductive strips on each side; and (j) filling said grooves with a conductive interconnecting material to electrically connect alternate pairs of strips to form electrically isolated first and second conductive electrodes.